ADM2483
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
DD1 1
GND
11 2
RxD
3
RE
4
16
15
V
DD2
GND
21
NC
13
B
TOP VIEW
(Not to Scale)
12
A
DE
5
ADM2483
14
TxD
6
PV
7
GND
11
8
11
10
9
NC
NC
GND
21
NC = NO CONNECT
1
PIN
2 AND PIN 8 ARE INTERNALLY CONNECTED.
EITHER OR BOTH MAY BE USED FOR GND
1
.
PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED.
EITHER OR BOTH MAY BE USED FOR GND
2
.
Figure 2. Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
1
2, 8
3
4
5
6
7
9, 15
10, 11, 14
12
13
16
Mnemonic
V
DD1
GND
1
RxD
RE
DE
TxD
PV
GND
2
NC
A
B
V
DD2
Description
Power Supply (Logic Side).
Ground (Logic Side).
Receiver Output Data. When enabled, if (A − B) ≥ −30 mV, then RxD = high. If (A − B) ≤ −200 mV, then
RxD = low. This is a tristate output when the receiver is disabled, that is, when RE is driven high.
Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and
driving it high disables the receiver.
Driver Enable Input. Driving the input high enables the driver, and driving it low disables the driver.
Transmit Data Input. Data to be transmitted by the driver is applied to this input.
Power_Valid. Used during power-up and power-down. See the Applications Information section.
Ground (Bus Side).
No Connect.
Noninverting Driver Output/Receiver Input. When the driver is disabled, or when V
DD1
or V
DD2
is
powered down, Pin A is put into a high impedance state to avoid overloading the bus.
Inverting Driver Output/Receiver Input. When the driver is disabled, or when V
DD1
or V
DD2
is powered
down, Pin B is put into a high impedance state to avoid overloading the bus.
Power Supply (Bus Side).
Rev. B | Page 8 of 20
04736-002
AD [ ANALOG DEVICES ]
