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ADM2483BRWZ-REEL 参数 Datasheet PDF下载

ADM2483BRWZ-REEL图片预览
型号: ADM2483BRWZ-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: 半双工, iCoupler®隔离RS- 485收发器 [Half-Duplex, iCoupler® Isolated RS-485 Transceiver]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
文件页数/大小: 20 页 / 244 K
品牌: AD [ ANALOG DEVICES ]
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Half-Duplex,
iCoupler
®
Isolated RS-485 Transceiver
ADM2483
FEATURES
RS-485 transceiver with electrical data isolation
Complies with ANSI TIA/EIA RS-485-A and ISO 8482: 1987(E)
500 kbps data rate
Slew rate-limited driver outputs
Low power operation: 2.5 mA max
Suitable for 5 V or 3 V operations (V
DD1
)
High common-mode transient immunity: >25 kV/μs
True fail-safe receiver inputs
Chatter-free power-up/power-down protection
256 nodes on bus
Thermal shutdown protection
Safety and regulatory approvals
UL recognition: 2500 V
rms
for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN EN 60747-5-2 (VDE 0884 Rev. 2): 2003-01
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000
V
IORM
= 560 V peak
Operating temperature range: −40°C to +85°C
FUNCTIONAL BLOCK DIAGRAM
V
DD1
V
DD2
TxD
PV
RxD
RE
GND
1
GALVANIC ISOLATION
DE
ADM2483
A
B
04736-001
GND
2
Figure 1.
APPLICATIONS
Low power RS-485/RS-422 networks
Isolated interfaces
Building control networks
Multipoint data transmission systems
GENERAL DESCRIPTION
The ADM2483 differential bus transceiver is an integrated,
galvanically isolated component designed for bidirectional data
communication on balanced, multipoint bus transmission lines.
It complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E).
Using Analog Devices’
iCoupler
technology, the ADM2483
combines a 3-channel isolator, a three-state differential line
driver, and a differential input receiver into a single package.
The logic side of the device is powered with either a 5 V or 3 V
supply, and the bus side uses a 5 V supply only.
The ADM2483 is slew-limited to reduce reflections with
improperly terminated transmission lines. The controlled slew
rate limits the data rate to 500 kbps. The device’s input impedance
is 96 kΩ, allowing up to 256 transceivers on the bus. Its driver
has an active-high enable feature. The driver differential outputs
and receiver differential inputs are connected internally to form
a differential I/O port. When the driver is disabled or when
V
DD1
or V
DD2
= 0 V, this imposes minimal loading on the bus.
An active-high receiver disable feature, which causes the receive
output to enter a high impedance state, is provided as well.
The receiver inputs have a true fail-safe feature that ensures a
logic-high receiver output level when the inputs are open or
shorted. This guarantees that the receiver outputs are in a
known state before communication begins and at the point
when communication ends.
Current limiting and thermal shutdown features protect against
output short circuits and bus contention situations that might
cause excessive power dissipation. The part is fully specified
over the industrial temperature range and is available in a
16-lead, wide body SOIC package.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.