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ADM222AR 参数 Datasheet PDF下载

ADM222AR图片预览
型号: ADM222AR
PDF下载: 下载PDF文件 查看货源
内容描述: 高速,+ 5 V, 0.1 uF的CMOS RS - 232驱动器/接收器 [High Speed, +5 V, 0.1 uF CMOS RS-232 Drivers/Receivers]
分类和应用: 驱动器
文件页数/大小: 9 页 / 331 K
品牌: AD [ ANALOG DEVICES ]
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ADM222/ADM232A/ADM242
PIN FUNCTION DESCRIPTION
V
IN
SHDN
3kΩ
50pF
V
OUT
Mnemonic
V
CC
V+
V–
Function
Power Supply Input,
+5
V
±
10%.
Internally generated positive supply (+10 V
nominal).
Internally generated negative supply (–10 V
nominal).
Ground Pin. Must be connected to 0 V.
External capacitor 1, (+ terminal) is connected
to this pin.
External capacitor 1, (– terminal) is connected
to this pin.
External capacitor 2, (+ terminal) is connected
to this pin.
External capacitor 2, (– terminal) is connected
to this pin.
Transmitter (Driver) Inputs. These inputs accept
TTL/CMOS levels. An internal 400 kΩ pull-up
resistor to V
CC
is connected on each input.
Transmitter (Driver) Outputs. These are RS-232
levels (typically
±
9 V).
Receiver Inputs. These inputs accept RS-232
signal levels. An internal 5 kΩ pull-down
resistor to GND is connected on each of these
inputs.
Receiver Outputs. These are TTL/CMOS levels.
No Connect. No connections are required to this
pin.
(ADM242 Only) Active Low Digital Input. May
be used to enable or disable (three-state) both
receiver outputs.
(ADM222 & ADM242) Active Low Digital
Input. May be used to disable the device so that
the power consumption is minimized. On the
ADM222 all drivers and receivers are disabled.
On the ADM242 the drivers are disabled but the
receivers remain enabled.
Figure 5. Shutdown Test Circuit
GND
C1+
C1–
C2+
3V
SHDN
INPUT
0V
C2–
t
DT
T
IN
V+
+ 5V
T
OUT
TRANSMITTER
OUTPUT
– 5V
V–
R
IN
Figure 6. Transmitter Shutdown Disable Timing
R
OUT
NC
EN
+5V INPUT
C5
0.1µF
6.3V
2
C1
0.1µF
4
5
C2
0.1µF
6
C1+
C1–
C2+
C2–
15
T1
11
T2
IN
13
R1
OUT
TTL/CMOS
OUTPUTS
10
R2
OUT
R2
R1
9
R2
IN
18
SHDN
T2
14
R1
IN
RS-232
INPUTS
**
8
T2
OUT
T1
OUT
RS-232
OUTPUTS
SHDN
17
V
CC
3
+5V TO +10V
V+
VOLTAGE DOUBLER
+5V TO –10V
VOLTAGE INVERTER V–
7
C3
0.1µF
C4
0.1µF
12
TTL/CMOS
INPUTS
*
T1
IN
NC
C1+
V+
C1–
C2+
C2–
V–
T2
OUT
R2
IN
1
2
3
4
5
6
7
8
9
18
17
16
SHDN
V
CC
GND
T1
OUT
R1
IN
R1
OUT
T1
IN
T2
IN
R2
OUT
ADM222
15
ADM222
GND
16
TOP VIEW 14
(Not to Scale) 13
12
11
10
*
INTERNAL 400kΩ PULL-UP RESISTOR
ON EACH TTL/MOS INPUT
**
INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
NC = NO CONNECT
Figure 7. ADM222 Typical Operating Circuit
Figure 8. ADM222 DIP & SOIC Pin Configurations
–4–
REV. 0