欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADM211ARSZ-REEL 参数 Datasheet PDF下载

ADM211ARSZ-REEL图片预览
型号: ADM211ARSZ-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: 0.1 MUF , 5 V供电的CMOS RS - 232驱动器/接收器 [0.1 muF, 5 V Powered CMOS RS-232 Drivers/Receivers]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
文件页数/大小: 16 页 / 218 K
品牌: ADI [ ADI ]
 浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第8页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第9页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第10页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第11页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第13页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第14页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第15页浏览型号ADM211ARSZ-REEL的Datasheet PDF文件第16页  
ADM206–ADM211/ADM213  
ꢀeceivers ꢀ4 and ꢀ5 on the ADM2±3 remain enabled during  
shutdown. This feature allows monitoring external activity  
while the device is in a low power shutdown mode. The  
shutdown control input is active high on all parts except the  
ADM2±3, where it is active low. Ree Table 5 and Table 6.  
APPLICATION HINTS  
Driving Long Cables  
In accordance with the EIA-232-E standard, long cables are  
permissible provided the total load capacitance does not exceed  
2500 pF. For longer cables that do exceed this, it is possible to  
trade off baud rate for cable length. Large load capacitances cause  
a reduction in slew rate, and therefore the maximum transmis-  
sion baud rate is decreased. The ADM206–ADM2±±/ADM2±3  
are designed to minimize the slew rate reduction that occurs as  
load capacitance increases.  
Enable Input  
The ADM209, ADM2±±, and ADM2±3 feature an enable input  
used to enable or disable the receiver outputs. The enable input  
is active low on the ADM209 and ADM2±± and active high on  
the ADM2±3. Ree Table 5 and Table 6. When the receivers are  
disabled, their outputs are placed in a high impedance state.  
This function allows the outputs to be connected directly to a  
microprocessor data bus. It can also be used to allow receivers  
from different devices to share a common data line. The timing  
diagram for the enable function is shown in Figure 24.  
For the receivers, it is important that a high level of noise  
immunity be inbuilt so that slow rise and fall times do not  
cause multiple output transitions as the signal passes slowly  
through the transition region. The ADM206–ADM2±±/  
ADM2±3 have 0.65 V of hysteresis to guard against this. This  
ensures that even in noisy environments error-free reception  
can be achieved.  
3V  
EN*  
0V  
High Baud Rate Operation  
T
T
The ADM206–ADM2±±/ADM2±3 feature high slew rates,  
permitting data transmission at rates well in excess of the EIA-  
232-E specification. The drivers maintain ±5 V signal levels at  
data rates up to ±20 kB/s under worst-case loading conditions.  
EN  
DIS  
V
– 0.1V  
+ 0.1V  
3.5V  
0.8V  
OH  
R
OUT  
V
OL  
*POLARITY OF EN IS REVERSED FOR ADM213.  
Figure 24. Enable Timing  
Rev. C | Page 12 of 16