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ADM202EARWZ-REEL 参数 Datasheet PDF下载

ADM202EARWZ-REEL图片预览
型号: ADM202EARWZ-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: EMI / EMC兼容, ±15千伏ESD保护的RS - 232线路驱动器/接收器 [EMI/EMC-Compliant, +-15 kV, ESD-Protected RS-232 Line Drivers/Receivers]
分类和应用: 驱动器
文件页数/大小: 16 页 / 245 K
品牌: ADI [ ADI ]
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ASM202E/ASM±±8±A  
GENERAL SEꢁCRIꢂTION  
desired, larger capacitors (up to 47 µF) can be used for  
Capacitor C1 to Capacitor C4. This facilitates direct substitution  
with older generation charge-pump RS-232 transceivers.  
The ADM202E/ADM1181E are rugged RS-232 line  
drivers/receivers. Step-up voltage converters coupled with level-  
shifting transmitters and receivers allow RS-232 levels to be  
developed while operating from a single 5 V supply.  
Features include low power consumption, high transmission  
rates, and compliance with the EU directive on electromagnetic  
compatibility. EM compatibility includes protection against  
radiated and conducted interference, including high levels of  
electrostatic discharge.  
S3  
S1  
V
V+ = 2V  
CC  
CC  
C3  
C1  
S2  
S4  
V
GND  
CC  
INTERNAL  
OSCILLATOR  
All inputs and outputs contain protection against electrostatic  
discharges of up to 15 kV and electrical fast transients of up  
to 2 kV. This ensures compliance to IEC1000-4-2 and  
IEC1000-4-4 requirements.  
NOTE: C3 CONNECTS BETWEEN V+ AND GND ON THE ADM1181A  
Figure 6. Charge-Pump Voltage Doubler  
The devices are ideally suited for operation in electrically harsh  
environments or where RS-232 cables are frequently being  
plugged/unplugged. They are also immune to high RF field  
strengths without special shielding precautions.  
S3  
S4  
S1  
S2  
V+  
GND  
FROM  
VOLTAGE  
DOUBLER  
C4  
C2  
V– = –(V+)  
GND  
CMOS technology is used to minimize the power dissipation,  
allowing maximum battery life in portable applications.  
INTERNAL  
OSCILLATOR  
The ADM202E/ADM1181A serve as a modification,  
enhancement, and improvement to the ADM230–ADM241  
family and its derivatives. It is essentially plug-in compatible  
and do not have materially different applications.  
Figure 7. Charge-Pump Voltage Inverter  
Transmitter (Driver) Section  
The drivers convert 5 V logic input levels into RS-232 output  
levels. When driving an RS-232 load with VCC = 5 V, the output  
voltage swing is typically 9 V.  
CIRCUIT DESCRIPTION  
The internal circuitry consists of four main sections:  
A charge-pump voltage converter  
5 V logic to EIA-232 transmitters  
EIA-232 to 5 V logic receivers.  
Receiver Section  
The receivers are inverting level shifters that accept RS-232  
input levels and translate them into 5 V logic output levels. The  
inputs have internal 5 kΩ pull-down resistors to ground and are  
also protected against overvoltages of up to 30 V. Unconnected  
inputs are pulled to 0 V by the internal 5 kΩ pull-down resistor.  
Therefore, unconnected inputs and those connected to GND  
have a Logic 1 output level.  
Transient protection circuit on all I/O lines  
Charge-Pump DC-to-DC Voltage Converter  
The charge-pump voltage converter consists of a 200 kHz  
oscillator and a switching matrix. The converter generates a  
10 V supply from the input 5 V level. This is done in two stages,  
using a switched capacitor technique, as illustrated in Figure 6  
and Figure 7. First, the 5 V input supply is doubled to 10 V, using  
Capacitor C1 as the charge storage element. The 10 V level is  
then inverted to generate −10 V, using C2 as the storage element.  
The receivers have Schmitt-trigger inputs with a hysteresis level  
of 0.65 V. This ensures error-free reception for both noisy  
inputs and inputs with slow transition times.  
HIGH BAUD RATE  
The ADM202E/ADM1181A feature high slew rates, permitting  
data transmission at rates well in excess of the EIA/RS-232-E  
specifications. RS-232 voltage levels are maintained at data rates  
of up to 230 kbps, even under worst case loading conditions.  
This allows for high speed data links between two terminals and  
is also suitable for the new generation ISDN modem standards,  
which require data rates of 230 kbps. The slew rate is internally  
controlled to less than 30 V/µs to minimize EMI interference.  
Capacitor C3 and Capacitor C4 are used to reduce the output  
ripple. Their values are not critical and can be increased if  
desired. On the ADM202E, Capacitor C3 is shown connected  
between V+ and VCC, whereas it is connected between V+ and  
GND on the ADM1181A. It is acceptable to use either  
configuration with both the ADM202E and ADM1181A. If  
Rev. C | Page 6 of 16  
 
 
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