ADM1026
INT
CI
Notes
•
For a NAND tree test to work, all outputs ( , RSTMAIN,
INT
SDA
RSTSTBY, and PWM) must remain high during the test.
SCL
•
•
When generating test waveforms, allow for a typical
propagation delay of 500 ns through the NAND tree.
FAN7
FAN6
If any of the inputs shown in Figure 56 are unused, they
should not be connected direct to ground, but via a resistor
such as 10 kΩ. This allows the automatic test equipment
(ATE) to drive every input high so that the NAND tree test
can be properly carried out.
FAN5
FAN4
FAN3
FAN2
FAN1
GPIO16
FAN0
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
GPIO8
FAN0
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
SCL
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
NTESTOUT
Figure 58. NAND Tree Test Taking Inputs Low in Turn
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
SDA
CI
INT
GPIO8
NTESTOUT
FAN0
FAN1
Figure 57. NAND Tree Test Taking Inputs High in Turn
NTESTOUT
Figure 59. NAND Tree Test with GPIO11 Stuck Low
In the event of an input being nonfunctional (stuck high or low)
or two inputs shorted together, the output pattern is different.
Some examples are given in Figure 59 through Figure 61.
Figure 59 shows the effect of one input being stuck low. The
output pattern is normal until the stuck input is reached.
Because that input is permanently low, neither it nor any inputs
further up the tree can have any effect on the output.
Rev. A | Page 32 of 56
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