ADM1026
Hex
Address
Name
Power-On Value Description
Low limit for AIN0 measurement
58
AIN0 Low Limit
00h
00h
00h
00h
00h
00h
00h
00h
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
50h (80°C)
80h
FFh
00h
FFh
00h
00h
00h
59
AIN± Low Limit
AIN2 Low Limit
AIN3 Low Limit
AIN4 Low Limit
AIN5 Low Limit
AIN6 Low Limit
AIN7 Low Limit
FAN0 High Limit
FAN± High Limit
FAN2 High Limit
FAN3 High Limit
FAN4 High Limit
FAN5 High Limit
FAN6 High Limit
FAN7 High Limit
Int. Temp. High Limit
Int. Temp. Low Limit
VBAT High Limit
VBAT Low Limit
Low limit for AIN± measurement
Low limit for AIN2 measurement
Low limit for AIN3 measurement
Low limit for AIN4 measurement
Low limit for AIN5 measurement
Low limit for AIN6 measurement
Low limit for AIN7 measurement
High limit for Fan 0 speed measurement (no low limit)
High limit for Fan ± speed measurement (no low limit)
High limit for Fan 2 speed measurement (no low limit)
High limit for Fan 3 speed measurement (no low limit)
High limit for Fan 4 speed measurement (no low limit)
High limit for Fan 5 speed measurement (no low limit)
High limit for Fan 6 speed measurement (no low limit)
High limit for Fan 7 speed measurement (no low limit)
High limit for local temperature measurement
Low limit for local temperature measurement
High limit for VBAT measurement
Low limit for VBAT measurement
High limit for AIN8 measurement
Low limit for AIN8 measurement
Offset register for Remote Temperature Channel ±
Offset register for Remote Temperature Channel 2
5A
5B
5C
5D
5E
5F
60
6±
62
63
64
65
66
67
68
69
6A
6B
6C
6D
6E
AIN8 High Limit
AIN8 Low Limit
Ext± Temp Offset
Ext2 Temp Offset
6F
DETAILED REGISTER DESCRIPTIONS
Table 13. Register 00h, Configuration Register 1 (Power-On Default 00h)
Bit Name
R/W
Description
0
Monitor = 0
R/W
When this bit is set the ADM±026 monitors all voltage, temperature and fan channels in a round
robin manner.
±
2
Int Enable = 0
Int Clear = 0
R/W
R/W
When this bit is set, the INT output pin is enabled.
Setting this bit clears an interrupt from the voltage, temperature or fan speed channels. Because
GPIO interrupts are level triggered, this bit has no effect on interrupts originating from GPIO
channels. This bit is cleared by writing a 0 to it. If in monitoring mode voltages, temperatures and
fan speeds continue to be monitored after writing to this bit to clear an interrupt, so an interrupt
may be set again on the next monitoring cycle.
3
4
Enable Voltage/Ext2 = 0 R/W
When this bit is ±, the ADM±026 monitors voltage (AIN8 and AIN9) on Pins 28 and 27, respectively.
When this bit is 0, the ADM±026 monitors a second thermal diode temperature channel, D2, on
these pins. If the second thermal diode channel is not being used, it is recommended that the bit
be set to ±.
When this bit is ±, the THERM pin (Pin 42) is asserted (go low) if any of the THERM limits are
exceeded. If THERM is pulled low as an input, the DAC and PWM outputs are forced to full scale
until THERM is taken high.
Enable THERM = 0
R/W
5
6
7
Enable DAC AFC = 0
Enable PWM AFC = 0
Software Reset = 0
R/W
R/W
R/W
When this bit is ±, the DAC output is enabled for automatic fan speed control (AFC) based on
temperature. When this bit is 0, the DAC Output reflects the value in Reg 04h, the DAC Control
Register.
When this bit is ±, the PWM output is enabled for automatic fan speed control (AFC) based on
temperature. When this bit is 0, the PWM Output reflects the value in Reg 05h, the PWM Control
Register.
Writing a ± to this bit restores all registers to the power-on defaults. This bit is cleared by writing a
0 to it. For more info, see the Software Reset Function section.
Rev. A | Page 38 of 56
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