ADM1024
selected by the Address Pointer Register. This is illustrated in
Figure 2a. The device address is sent over the bus followed by
R/W set to 0. This is followed by two data bytes. The first data
byte is the address of the internal data register to be written to,
which is stored in the Address Pointer Register. The second
data byte is the data to be written to the internal data register.
When reading data from a register, there are two possibilities:
1. If the ADM1024’s Address Pointer Register value is unknown
or not the desired value, it is first necessary to set it to the
correct value before data can be read from the desired data
register. This is done by performing a write to the ADM1024
as before, but only the data byte containing the register ad-
dress is sent, as data is not to be written to the register. This
is shown in Figure 2b.
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte read
from the data register. This is shown in Figure 2c.
2. If the Address Pointer Register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the Address Pointer
Register, so Figure 2b can be omitted.
NOTES
2. In Figures 2a to 2c, the serial bus address is shown as the
default value 01011(A1)(A0), where A1 and A0 are set by
the three-state ADD pin.
MEASUREMENT INPUTS
The ADM1024 has nine external measurement pins that can be
configured to perform various functions by programming the
Channel Mode Register.
Pins 13 and 14 are dedicated to temperature measurement,
while Pins 15, 16, and 19 are dedicated analog input channels.
Their function is unaffected by the Channel Mode Register.
Pins 5 and 6 can be individually programmed as analog inputs,
or as digital fan speed measurement inputs, by programming
Bits 0 and 1 of the Channel Mode Register.
Pins 17 and 18 can be configured as analog inputs or as inputs
for external temperature-sensing diodes by programming Bit 2
of the Channel Mode Register.
Bit 3 of the Channel Mode Register configures the internal V
CC
measurement range for either 3.3 V or 5 V.
Bits 4 to 6 of the Channel Mode Register enable or disable
Pins 22 to 24 when they are configured as interrupt inputs by
setting Bit 7 of the Channel Mode Register. This function is
controlled for Pins 20 and 21 by Bits 6 and 7 of Configuration
Register 2.
Bit 7 of the Channel Mode Register allows the processor core
voltage ID bits (VID0 to VID4, Pins 24 to 20) to be reconfigured
as interrupt inputs.
A truth table for the Channel Mode Register is given in Table II.
1. Although it is possible to read a data byte from a data regis-
ter without first writing to the Address Pointer Register, if
the Address Pointer Register is already at the correct value, it
is not possible to write data to a register without writing to
the Address Pointer Register because the first data byte of a
write is always written to the Address Pointer Register.
REV. C
–9–
AD [ ANALOG DEVICES ]
