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ADG507AKN 参数 Datasheet PDF下载

ADG507AKN图片预览
型号: ADG507AKN
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 8位/ 16通道模拟多路复用器 [CMOS 8-/16-Channel Analog Multiplexers]
分类和应用: 复用器开关复用器或开关信号电路光电二极管
文件页数/大小: 8 页 / 138 K
品牌: AD [ ANALOG DEVICES ]
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ADG506A/ADG507A
TERMINOLOGY
t
OFF
(EN)
t
TRANSITION
R
ON
R
ON
Match
R
ON
Drift
I
S
(OFF)
I
D
(OFF)
I
D
(ON)
V
S
(V
D
)
C
S
(OFF)
C
D
(OFF)
C
IN
t
ON
(EN)
Ohmic resistance between terminals D and S
Difference between the R
ON
of any two channels
Change in R
ON
versus temperature
Source terminal leakage current when the switch
is off
Drain terminal leakage current when the switch
is off
Leakage current that flows from the closed switch
into the body
Analog voltage on terminal S or D
Channel input capacitance for “OFF” condition
Channel output capacitance for “OFF” condition
Digital input capacitance
Delay time between the 50% and 90% points of
the digital input and switch “ON” condition
V
INL
V
INH
I
INL
(I
INH
)
V
DD
V
SS
I
DD
I
SS
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Lead Plastic DIP (Suffix N)
0.550 (13.97)
0.53 (13.47)
28-Lead Cerdip (Suffix Q)
1.490 (37.84) MAX
0.525 (13.33)
0.515 (13.08)
1.45(36.83)
1.44 (36.58)
0.2
(5.08)
MAX
0.012 (0.305)
0.175 (4.45) 0.008 (0.203)
0.12 (3.05)
15
0
0.11 (2.79)
0.099 (2.28)
0.02 (0.5)
0.016 (0.406)
15°
0.606 (15.4)
0.594 (15.09)
0.16 (4.07)
0.14 (3.56)
0.22 (5.59) GLASS
MAX
SEALANT
0.06 (1.52)
0.05 (1.27)
0.125
(3.175)
MIN
0.18(4.57)
MAX
0.62 (15.74)
0.59 (14.93)
0.065 (1.66)
0.045 (1.15)
0.020 (0.508) 0.105 (2.67)
0.015 (0.381) 0.095 (2.42)
0.012 (0.305)
0.008 (0.203)
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42
28-Lead SOIC (Suffix R)
0.7125 (18.10)
0.6969 (17.70)
28
15
28-Lead TSSOP (Suffix RU)
0.386 (9.80)
0.378 (9.60)
28
15
0.177 (4.50)
0.169 (4.30)
0.4193 (10.65)
0.3937 (10.00)
0.2992 (7.60)
0.2914 (7.40)
1
14
1
14
PIN 1
0.1043 (2.65)
0.0926 (2.35)
0.0291 (0.74)
x 45°
0.0098 (0.25)
PIN 1
0.006 (0.15)
0.002 (0.05)
0.256 (6.50)
0.246 (6.25)
0.0118 (0.30)
0.0040 (0.10)
0.0500
(1.27)
BSC
8° 0.0500 (1.27)
0.0192 (0.49)
0° 0.0157 (0.40)
SEATING 0.0125 (0.32)
0.0138 (0.35)
PLANE 0.0091 (0.23)
SEATING
PLANE
0.0256 (0.65) 0.0118 (0.30)
BSC
0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
28-Terminal Plastic Leaded Chip Carrier (Suffix P)
4
5
PIN 1
IDENTIFIER
26
25
28-Terminal Leadless Ceramic Chip Carrier (Suffix E)
0.100 (2.54)
0.064 (1.63)
0.095 (2.41)
0.075 (1.90)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075
(1.91)
REF
0.075
(1.91)
REF
26
2
5
TOP VIEW
(PINS DOWN)
11
12
19
18
0.050 0.005
01.27 0.13
0.021 (0.533) 0.430 (10.5)
0.013 (0.331)
0.390 (9.9)
0.032 (0.812)
0.026 (0.661)
0.120 (3.04)
0.090 (2.29)
0.180 (4.51)
0.165 (4.20)
0.300 (7.62)
BSC
0.150
(3.51)
BSC
4
28
1
5
0.015 (0.38)
MIN
0.028 (0.71)
0.022 (0.56)
0.050
(1.27)
BSC
45° TYP
0.456 (11.582)
0.450 (11.430) SQ
0.498 (12.57)
SQ
0.485 (12.32)
0.458 (11.63)
0.442 (11.23) 0.458
SQ
(11.63)
MAX
SQ
BOTTOM
VIEW
19
18
12
11
0.088 (2.24)
0.054 (1.37)
0.055 (1.40)
0.045 (1.14)
0.200
(5.08)
BSC
–8–
REV. C
PRINTED IN U.S.A.
0.0433
(1.10)
MAX
C1150c–0–6/98
t
OPEN
Delay time between the 50% and 10% points of
the digital input and switch “OFF” condition
Delay time between the 50% and 90% points of
the digital inputs and switch “ON” condition
when switching from one address state to
another
“OFF” time measured between 50% points of
both switches when switching from one address
state to another
Maximum input voltage for Logic “0”
Minimum input voltage for Logic “1”
Input current of the digital input
Most positive voltage supply
Most negative voltage supply
Positive supply current
Negative supply current