ADG408/ADG409
TERMINOLOGY
RON
tTRANSITION
Ohmic resistance between D and S.
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
ΔRON
Difference between the RON of any two channels.
tOPEN
IS (OFF)
Off time measured between the 80% point of both switches
when switching from one address state to another.
Source leakage current when the switch is off.
ID (OFF)
VINL
Drain leakage current when the switch is off.
Maximum input voltage for Logic 0.
ID, IS (ON)
VINH
Channel leakage current when the switch is on.
Minimum input voltage for Logic 1.
VD (VS)
IINL (IINH
Input current of the digital input.
)
Analog voltage on Terminal D and Terminal S.
CS (OFF)
Crosstalk
Channel input capacitance for off condition.
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
CD (OFF)
Channel output capacitance for off condition.
Off Isolation
A measure of unwanted signal coupling through an off channel.
CD, CS (ON)
On switch capacitance.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
CIN
Digital input capacitance.
IDD
tON (EN)
Positive supply current.
Delay time between the 50% and 90% points of the digital input
and switch on condition.
ISS
Negative supply current.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
Rev. C | Page 13 of 16
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