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ADF4113BRU-REEL 参数 Datasheet PDF下载

ADF4113BRU-REEL图片预览
型号: ADF4113BRU-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC PLL FREQUENCY SYNTHESIZER, 4000 MHz, PDSO16, MO-153AB, TSSOP-16, PLL or Frequency Synthesis Circuit]
分类和应用: 信息通信管理光电二极管
文件页数/大小: 28 页 / 437 K
品牌: ADI [ ADI ]
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ADF4110/ADF4111/ADF4112/ADF4113  
RF  
OUT  
100pF  
18  
18Ω  
VCO  
100pF  
18Ω  
LOOP  
FILTER  
2
CP  
FREF  
IN  
8
REF  
IN  
INPUT OUTPUT  
ADF4111  
ADF4112  
ADF4113  
GND  
CE  
CLK  
DATA  
LE  
LOCK  
DETECT  
14  
MUXOUT  
1
R
SET  
100pF  
6
5
RF  
RF  
A
B
IN  
2.7kΩ  
51Ω  
IN  
100pF  
AD5320  
12-BIT  
V-OUT DAC  
POWER SUPPLY CONNECTIONS AND DECOUPLING  
CAPACITORS ARE OMITTED FOR CLARITY.  
SPI COMPATIBLE SERIAL BUS  
Figure 34. Driving the RSET Pin with a D/A Converter  
a tuning range as wide as an octave. For example, cable TV  
tuners have a total range of about 400 MHz. Figure 36 shows an  
application where the ADF4113 is used to control and program  
the Micronetics M3500-2235. The loop filter was designed for  
an RF output of 2900 MHz, a loop bandwidth of 40 kHz, a PFD  
frequency of 1 MHz, ICP of 10 mA (2.5 mA synthesizer ICP  
multiplied by the gain factor of 4), VCO KD of 90 MHz/V  
(sensitivity of the M3500-2235 at an output of 2900 MHz), and  
a phase margin of 45°C.  
USING A D/A CONVERTER TO DRIVE THE RSET PIN  
A D/A converter can be used to drive the RSET pin of the  
ADF4110 family, thus increasing the level of control over the  
charge pump current, ICP. This can be advantageous in wide-  
band applications where the sensitivity of the VCO varies over  
the tuning range. To compensate for this, the ICP may be varied  
to maintain good phase margin and ensure loop stability. See  
Figure 34.  
SHUTDOWN CIRCUIT  
In narrow-band applications, there is generally a small variation  
in output frequency (generally less than 10ꢀ) and a small  
variation in VCO sensitivity over the range (typically 10ꢀ to  
15ꢀ). However, in wideband applications, both of these  
parameters have a much greater variation. In Figure 36, for  
example, there is a −25ꢀ and +17ꢀ variation in the RF output  
from the nominal 2.9 GHz. The sensitivity of the VCO can vary  
from 120 MHz/V at 2750 MHz to 75 MHz/V at 3400 MHz  
(+33ꢀ, −17ꢀ). Variations in these parameters change the loop  
bandwidth. This in turn can affect stability and lock time. By  
changing the programmable ICP, it is possible to get compensa-  
tion for these varying loop conditions and ensure that the loop  
is always operating close to optimal conditions.  
The attached circuit in Figure 35 shows how to shut down both  
the ADF4110 family and the accompanying VCO. The ADG701  
switch goes closed circuit when a Logic 1 is applied to the IN  
input. The low cost switch is available in both SOT-23 and  
MSOP packages.  
WIDEBAND PLL  
Many of the wireless applications for synthesizers and VCOs in  
PLLs are narrow band in nature. These applications include the  
various wireless standards like GSM, DSC1800, CDMA, and  
WCDMA. In each of these cases, the total tuning range for the  
local oscillator is less than 100 MHz. However, there are also  
wideband applications for which the local oscillator could have  
Rev. C | Page 23 of 28  
 
 
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