ADF4110/ADF4111/ADF4112/ADF4113
Table 10. Initialization Latch Map
CURRENT
SETTING
2
CURRENT
SETTING
1
PRESCALER
VALUE
TIMER COUNTER
CONTROL
MUXOUT
CONTROL
CONTROL
BITS
DB12 DB11 DB10
DB9
F4
DB8
F3
DB7
F2
DB6
M3
DB3
PD1
DB1
C2 (1) C1 (1)
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13
DB5
M2
DB4
M1
DB2
F1
DB0
P2
P1
PD2
CPI6 CPI5 CPI4 CPI3 CPI2 CPI1
TC4
TC3
TC2
TC1
F5
COUNTER
OPERATION
F1
0
PHASE DETECTOR
POLARITY
NORMAL
F2
0
1
R, A, B COUNTERS
HELD IN RESET
NEGATIVE
POSITIVE
1
F3
0
CHARGE PUMP
OUTPUT NORMAL
THREE-STATE
1
F4
0
F5
FASTLOCK MODE
FASTLOCK DISABLED
FASTLOCK MODE 1
FASTLOCK MODE 2
X
0
1
1
1
TIMEOUT
TC4
TC3
TC2
TC1
(PFD CYCLES)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63
M3
0
M2
0
M1
0
OUTPUT
THREE-STATE OUTPUT
0
0
1
DIGITAL LOCK DETECT
(ACTIVE HIGH)
0
0
1
1
1
1
0
0
0
1
0
1
N DIVIDER OUTPUT
DV
DD
R DIVIDER OUTPUT
ANALOG LOCK DETECT
(N-CHANNEL OPEN-DRAIN)
SEE FUNCTION LATCH,
TIMER COUNTER CONTROL
SECTION
CPI6
CPI5
CPI4
I
(mA)
CP
1
1
1
1
0
1
SERIAL DATA OUTPUT
DGND
2.7kΩ
4.7kΩ
10kΩ
CPI3
0
CPI2
0
CPI1
0
1.09
0.63
0.29
0.59
0.88
1.76
1.47
1.76
2.06
2.35
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
2.18
3.27
4.35
5.44
6.53
7.62
8.70
1.25
1.88
2.50
3.13
3.75
4.38
5.00
CE PIN PD2 PD1
MODE
0
1
1
1
X
X
0
1
X
0
1
1
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
ASYNCHRONOUS POWER-DOWN
SYNCHRONOUS POWER-DOWN
P2
P1
0
PRESCALER VALUE
8/9
0
0
1
1
16/17
32/33
64/65
1
0
1
Rev. C | Page 18 of 28
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