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AD9767AST 参数 Datasheet PDF下载

AD9767AST图片预览
型号: AD9767AST
PDF下载: 下载PDF文件 查看货源
内容描述: 14位, 125 MSPS双通道TxDAC + D / A转换器 [14-Bit, 125 MSPS Dual TxDAC+ D/A Converter]
分类和应用: 转换器
文件页数/大小: 27 页 / 469 K
品牌: AD [ ANALOG DEVICES ]
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AD9767–SPECIFICATIONS
DC SPECIFICATIONS
(T
Parameter
RESOLUTION
DC ACCURACY
1
Integral Linearity Error (INL)
T
A
= +25°C
T
MIN
to T
MAX
Differential Nonlinearity (DNL)
T
A
= +25°C
T
MIN
to T
MAX
ANALOG OUTPUT
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Gain Match
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance
Small Signal Bandwidth
TEMPERATURE COEFFICIENTS
Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
POWER SUPPLY
Supply Voltages
AVDD
DVDD
Analog Supply Current (I
AVDD
)
Digital Supply Current (I
DVDD
)
4
Digital Supply Current (I
DVDD
)
5
Supply Current Sleep Mode (I
AVDD
)
Power Dissipation
4
(5 V, I
OUTFS
= 20 mA)
Power Dissipation
5
(5 V, I
OUTFS
= 20 mA)
Power Dissipation
6
(5 V, I
OUTFS
= 20 mA)
Power Supply Rejection Ratio
7
—AVDD
Power Supply Rejection Ratio
7
—DVDD
OPERATING RANGE
MIN
to T
MAX
, AVDD = +5 V, DVDD = +5 V, I
OUTFS
= 20 mA, unless otherwise noted.)
Min
14
Typ
Max
Units
Bits
–3.5
–4.0
–2.5
–3.0
–0.02
–2
–5
–1.6
–0.14
2.0
–1.0
±
1.5
±
1.0
+3.5
+4.0
+2.5
+3.0
+0.02
+2
+5
+1.6
+0.14
20.0
+1.25
LSB
LSB
LSB
LSB
% of FSR
% of FSR
% of FSR
% of FSR
dB
mA
V
kΩ
pF
V
nA
V
MΩ
MHz
ppm of FSR/°C
ppm of FSR/°C
ppm of FSR/°C
ppm/°C
±
0.25
±
1
0.1
100
5
1.14
1.20
100
1.26
0.1
1
0.5
0
±
50
±
100
±
50
1.25
3
2.7
5
5
71
5
8
380
420
450
5.5
5.5
75
7
15
12
410
450
+0.4
+0.025
+85
–0.4
–0.025
–40
V
V
mA
mA
mA
mA
mW
mW
mW
% of FSR/V
% of FSR/V
°C
NOTES
1
Measured at I
OUTA
, driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32 times the I
REF
current.
3
An external buffer amplifier with input bias current <100 nA should be used to drive any external load.
4
Measured at f
CLOCK
= 25 MSPS and f
OUT
= 1.0 MHz.
5
Measured at f
CLOCK
= 100 MSPS and f
OUT
= 1 MHz.
6
Measured as unbuffered voltage output with I
OUTFS
= 20 mA and 50
R
LOAD
at I
OUTA
and I
OUTB
, f
CLOCK
= 100 MSPS and f
OUT
= 40 MHz.
7
±
10% Power supply variation.
Specifications subject to change without notice.
–2–
REV. B