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AD9767ASTZRL 参数 Datasheet PDF下载

AD9767ASTZRL图片预览
型号: AD9767ASTZRL
PDF下载: 下载PDF文件 查看货源
内容描述: 10位/ 12位/ 14位, 125 MSPS双通道TxDAC数字 - 模拟转换器 [10-/12-/14-Bit, 125 MSPS Dual TxDAC Digital-to-Analog Converters]
分类和应用: 转换器数模转换器
文件页数/大小: 44 页 / 643 K
品牌: ADI [ ADI ]
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Data Sheet  
AD9763/AD9765/AD9767  
SPECIFICATIONS  
DC SPECIFICATIONS  
TMIN to TMAX, AVDD = 3.3 V or 5 V, DVDD1 = DVDD2 = 3.3 V or 5 V, IOUTFS = 20 mA, unless otherwise noted.  
Table 1.  
AD9763  
Typ  
AD9765  
Typ  
AD9767  
Typ  
Parameter  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
RESOLUTION  
10  
12  
14  
Bits  
DC ACCURACY1  
Integral Linearity Error (INL)  
TA = 25°C  
−1  
0.1  
+1  
LSB  
LSB  
LSB  
LSB  
LSB  
LSB  
−1.5  
−2.0  
0.4  
0.3  
+1.5  
+2.0  
−3.5  
−4.0  
1.5  
1.0  
+3.5  
+4.0  
TMIN to TMAX  
Differential Nonlinearity (DNL)  
TA = 25°C  
−0.5  
0.07  
+0.5  
−0.75  
−1.0  
+0.75  
+1.0  
−2.5  
−3.0  
+2.5  
+3.0  
TMIN to TMAX  
ANALOG OUTPUT  
Offset Error  
−0.02  
−2  
+0.02  
+2  
−0.02  
−2  
+0.02  
+2  
−0.02  
−2  
+0.02  
+2  
% of FSR  
% of FSR  
% of FSR  
% of FSR  
dB  
Gain Error Without Internal Reference  
Gain Error with Internal Reference  
Gain Match  
0.25  
1
0.25  
1
0.25  
1
−5  
+5  
−5  
+5  
−5  
+5  
−1.6  
−0.14  
2.0  
0.1  
+1.6  
+0.14  
20.0  
+1.25  
−1.6  
−0.14  
2.0  
0.1  
+1.6  
+0.14  
20.0  
+1.25  
−1.6  
−0.14  
2.0  
0.1  
+1.6  
+0.14  
20.0  
+1.25  
Full-Scale Output Current2  
Output Compliance Range  
Output Resistance  
mA  
−1.0  
−1.0  
−1.0  
V
100  
5
100  
5
100  
5
kΩ  
Output Capacitance  
REFERENCE OUTPUT  
Reference Voltage  
pF  
1.14  
0.1  
1.20  
100  
1.26  
1.25  
1.14  
0.1  
1.20  
100  
1.26  
1.25  
1.14  
0.1  
1.20  
100  
1.26  
1.25  
V
Reference Output Current3  
nA  
REFERENCE INPUT  
Input Compliance Range  
Reference Input Resistance  
Small-Signal Bandwidth  
TEMPERATURE COEFFICIENTS  
Offset Drift  
V
1
1
1
MΩ  
MHz  
0.5  
0.5  
0.5  
0
0
0
ppm of FSR/°C  
ppm of FSR/°C  
ppm of FSR/°C  
ppm/°C  
Gain Drift Without Internal Reference  
Gain Drift with Internal Reference  
Reference Voltage Drift  
POWER SUPPLY  
50  
100  
50  
50  
100  
50  
50  
100  
50  
Supply Voltages  
AVDD  
3
5
5.5  
5.5  
75  
3
5
5.5  
5.5  
75  
3
5
5.5  
5.5  
75  
V
DVDD1, DVDD2  
2.7  
5
2.7  
5
2.7  
5
V
Analog Supply Current (IAVDD  
)
71  
5
71  
5
71  
5
mA  
4
Digital Supply Current (IDVDD  
)
)
7
7
7
mA  
5
Digital Supply Current (IDVDD  
15  
15  
15  
mA  
Supply Current Sleep Mode (IAVDD  
)
8
12.0  
410  
450  
8
12.0  
410  
450  
8
12.0  
410  
450  
mA  
Power Dissipation4 (5 V, IOUTFS = 20 mA)  
Power Dissipation5 (5 V, IOUTFS = 20 mA)  
Power Dissipation6 (5 V, IOUTFS = 20 mA)  
Power Supply Rejection Ratio7—AVDD  
Power Supply Rejection Ratio7—DVDD  
OPERATING RANGE  
380  
420  
450  
380  
420  
450  
380  
420  
450  
mW  
mW  
mW  
–0.4  
+0.4  
–0.4  
+0.4  
–0.4  
+0.4  
% of FSR/V  
% of FSR/V  
–0.025  
+0.025  
–0.025  
+0.025  
–0.025  
+0.025  
–40  
+85  
–40  
+85  
–40  
+85  
°C  
1 Measured at IOUTA, driving a virtual ground.  
2 Nominal full-scale current, IOUTFS, is 32 times the IREF current.  
3 An external buffer amplifier with input bias current <100 nA should be used to drive any external load.  
4 Measured at fCLK = 25 MSPS and fOUT = 1.0 MHz.  
5 Measured at fCLK = 100 MSPS and fOUT = 1 MHz.  
6 Measured as unbuffered voltage output with IOUTFS = 20 mA and RLOAD = 50 Ω at IOUTA and IOUTB, fCLK = 100 MSPS, and fOUT = 40 MHz.  
7
10% power supply variation.  
Rev. G | Page 5 of 44  
 
 
 
 
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