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AD9767ASTZRL 参数 Datasheet PDF下载

AD9767ASTZRL图片预览
型号: AD9767ASTZRL
PDF下载: 下载PDF文件 查看货源
内容描述: 10位/ 12位/ 14位, 125 MSPS双通道TxDAC数字 - 模拟转换器 [10-/12-/14-Bit, 125 MSPS Dual TxDAC Digital-to-Analog Converters]
分类和应用: 转换器数模转换器
文件页数/大小: 44 页 / 643 K
品牌: ADI [ ADI ]
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AD9763/AD9765/AD9767  
Data Sheet  
EVALUATION BOARD  
This board allows the user the flexibility to operate the AD9763/  
AD9765/AD9767 in various configurations. Possible output  
configurations include transformer coupled, resistor terminated,  
and single-ended and differential outputs. The digital inputs can be  
used in dual-port or interleaved mode and are designed to be  
driven from various word generators, with the on-board option  
to add a resistor network for proper load termination. When  
operating the AD9763/AD9765/AD9767, best performance is  
obtained by running the digital supply (DVDD1/DVDD2) at  
3.3 V and the analog supply (AVDD) at 5 V.  
GENERAL DESCRIPTION  
The AD9763/AD9765/AD9767-EBZ is an evaluation board  
for the AD9763/AD9765/AD9767 10-/12-/14-bit dual DAC.  
Careful attention to layout and circuit design, combined with a  
prototyping area, allow the user to easily and effectively evaluate  
the AD9763/AD9765/AD9767 in any application where a high  
resolution, high speed conversion is required.  
SCHEMATICS  
RED  
L2  
RED  
L1  
DVDDIN  
1
DVDD  
AVDDIN  
3
4
AVDD  
TB1  
TB1  
TB1  
BEAD  
BEAD  
C9  
C10  
DCASE  
DCASE  
VAL  
VOLT  
VAL  
VOLT  
BLK  
BLK  
BLK  
BLK  
BLK  
BLK  
BLK  
2
TB1  
BLK  
DGND  
AGND  
1
1
2
1
1
2
RCO M  
RCO M  
RCO M  
RCO M  
22  
22  
22 R1  
R2  
22  
R1  
R2  
R3  
R4  
R5  
R6  
R7  
R8  
R9  
R1  
R2  
R3  
R4  
R5  
R6  
R7  
R8  
R9  
R1  
R2  
R3  
R4  
R5  
R6  
R7  
R8  
R9  
2
3
2
3
INP31  
INP23  
INP24  
INP25  
INP26  
INP27  
INP28  
INP29  
INP30  
INP9  
INP1  
3
3
INP32  
INP33  
INP34  
INP35  
INP36  
INP10  
INP11  
INP12  
INP13  
INP14  
INP2  
INP3  
INP4  
INP5  
INP6  
INP7  
INP8  
R3  
4
4
4
4
R4  
5
5
5
5
R5  
6
6
6
6
R6  
7
7
7
7
R7  
8
8
8
8
R8  
9
9
9
9
INCK2  
INCK1  
R9  
10  
10  
10  
10  
RP15  
RP10  
RP9  
RP16  
Figure 86. Power Decoupling and Clocks on AD9763/AD9765/AD9767 Evaluation Board (1)  
Rev. G | Page 34 of 44  
 
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