AD9630
0.1
0.08
SETTLING PERCENTAGE – %
0.1
3.0
TEST CIRCUIT
2.5
2.0
100
0.04
0.02
0
–0.02
–0.04
–0.06
–0.08
V
OUT
= 2V STEP
1
10
100
1k
TIME – ns
10k
100k
VOLTS
6pF
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
5ns/DIVISION
–0.1
TEST CIRCUIT
50
50
6pF
TEST CIRCUIT
SETTLING PERCENTAGE – %
0.08
0.06
0.06
100
0.04
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.1
10
V
OUT
= 2V STEP
20
30
TIME – ns
40
50
6pF
Figure 13. Short-Term Settling Time
Figure 14. Long-Term Settling Time
Figure 15. Large-Signal Pulse
Response
40
R
L
= 100
50
2nd
60
dBc
dBc
70
80
90
100
1
10
FREQUENCY – MHz
100
3rd
40
R
L
= 100
50
60
2nd
70
3rd
80
90
100
1
10
FREQUENCY – MHz
100
Figure 16. Harmonic Distortion
V
OUT
= 4 V p-p
Figure 17. Harmonic Distortion
V
OUT
= 2 V p-p
–6–
REV. B
AD [ ANALOG DEVICES ]
