欢迎访问ic37.com |
会员登录 免费注册
发布采购

AD9280ARS 参数 Datasheet PDF下载

AD9280ARS图片预览
型号: AD9280ARS
PDF下载: 下载PDF文件 查看货源
内容描述: 完整的8位, 32 MSPS , 95毫瓦的CMOS A / D转换器 [Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter]
分类和应用: 转换器
文件页数/大小: 24 页 / 368 K
品牌: AD [ ANALOG DEVICES ]
 浏览型号AD9280ARS的Datasheet PDF文件第2页浏览型号AD9280ARS的Datasheet PDF文件第3页浏览型号AD9280ARS的Datasheet PDF文件第4页浏览型号AD9280ARS的Datasheet PDF文件第5页浏览型号AD9280ARS的Datasheet PDF文件第7页浏览型号AD9280ARS的Datasheet PDF文件第8页浏览型号AD9280ARS的Datasheet PDF文件第9页浏览型号AD9280ARS的Datasheet PDF文件第10页  
AD9280
DEFINITIONS OF SPECIFICATIONS
Integral Nonlinearity (INL)
Offset Error
Integral nonlinearity refers to the deviation of each individual
code from a line drawn from “zero” through “full scale.” The
point used as “zero” occurs 1/2 LSB before the first code transi-
tion. “Full scale” is defined as a level 1 1/2 LSB beyond the last
code transition. The deviation is measured from the center of
each particular code to the true straight line.
Differential Nonlinearity (DNL, No Missing Codes)
The first transition should occur at a level 1 LSB above “zero.”
Offset is defined as the deviation of the actual first code transi-
tion from that point.
Gain Error
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. It is often
specified in terms of the resolution for which no missing codes
(NMC) are guaranteed.
The first code transition should occur for an analog value 1 LSB
above nominal negative full scale. The last transition should
occur for an analog value 1 LSB below the nominal positive full
scale. Gain error is the deviation of the actual difference be-
tween first and last code transitions and the ideal difference
between the first and last code transitions.
Pipeline Delay (Latency)
The number of clock cycles between conversion initiation and
the associated output data being made available. New output
data is provided every rising edge.
Typical Characterization Curves
1.0
(AVDD = +3 V, DRVDD = +3 V, F
S
= 32 MHz (50% Duty Cycle), MODE = AVDD, 2 V Input
Span from 0.5 V to 2.5 V, External Reference, unless otherwise noted)
60
55
0.5
50
–0.5 AMPLITUDE
45
–6.0 AMPLITUDE
40
35
30
–20.0 AMPLITUDE
25
0
–0.5
SNR– dB
0
32
64
96
128
160
CODE OFFSET
192
224
240
DNL
–1.0
20
1.00E+05
1.00E+06
1.00E+07
INPUT FREQUENCY – Hz
1.00E+08
Figure 3. Typical DNL
Figure 5. SNR vs. Input Frequency
1.0
60
55
0.5
50
–0.5 AMPLITUDE
45
SINAD – dB
–6.0 AMPLITUDE
40
35
30
–20.0 AMPLITUDE
25
INL
0
–0.5
–1.0
0
32
64
96
128
160
CODE OFFSET
192
224
240
20
1.00E+05
1.00E+06
1.00E+07
INPUT FREQUENCY – Hz
1.00E+08
Figure 4. Typical INL
Figure 6. SINAD vs. Input Frequency
–6–
REV. D