AD9280–SPECIFICATIONS
Parameter
RESOLUTION
CONVERSION RATE
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
Offset Error
Gain Error
REFERENCE VOLTAGES
Top Reference Voltage
Bottom Reference Voltage
Differential Reference Voltage
Reference Input Resistance
1
ANALOG INPUT
Input Voltage Range
Input Capacitance
Aperture Delay
Aperture Uncertainty (Jitter)
Input Bandwidth (–3 dB)
Full Power (0 dB)
DC Leakage Current
INTERNAL REFERENCE
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2 V Mode)
Load Regulation (1 V Mode)
POWER SUPPLY
Operating Voltage
Supply Current
Power Consumption
Power-Down
Gain Error Power Supply Rejection
F
S
DNL
INL
E
ZS
E
FS
REFTS
REFBS
Symbol
(AVDD = +3 V, DRVDD = +3 V, F
S
= 32 MHz (50% Duty Cycle), MODE = AVDD, 2 V Input
Span from 0.5 V to 2.5 V, External Reference, T
MIN
to T
MAX
unless otherwise noted)
Min
Typ
8
32
±
0.2
±
0.3
±
0.2
±
1.2
1
GND
2
10
4.2
±
1.0
±
1.5
±
1.8
±
3.9
Max
Units
Bits
MHz
LSB
LSB
% FSR
% FSR
REFTS = 2.5 V, REFBS = 0.5 V
Condition
AVDD
V
AVDD – 1 V
V p-p
kΩ
kΩ
REFTS
V
pF
ns
ps
MHz
µA
V
mV
V
mV
V
V
mA
mW
mW
% FS
REFTS, REFBS: MODE = AVDD
Between REFTF & REFBF: MODE = AVSS
REFBS Min = GND: REFTS Max = AVDD
Switched
AIN
C
IN
t
AP
t
AJ
BW
REFBS
1
4
2
300
43
Input =
±
FS
REFSENSE = VREF
REFSENSE = GND
1 mA Load Current
VREF
VREF
1
±
10
2
0.5
2.7
2.7
3
3
31.7
95
4
1
±
25
2
5.5
5.5
36.7
110
AVDD
DRVDD
IAVDD
P
D
AVDD = 3 V, MODE = AVSS
AVDD = DRVDD = 3 V, MODE = AVSS
STBY = AVDD, MODE and CLOCK
= AVSS
PSRR
DYNAMIC PERFORMANCE (AIN = 0.5 dBFS)
Signal-to-Noise and Distortion
SINAD
f = 3.58 MHz
f = 16 MHz
Effective Bits
f = 3.58 MHz
f = 16 MHz
Signal-to-Noise
SNR
f = 3.58 MHz
f = 16 MHz
Total Harmonic Distortion
THD
f = 3.58 MHz
f = 16 MHz
Spurious Free Dynamic Range
SFDR
f = 3.58 MHz
f = 16 MHz
Differential Phase
DP
Differential Gain
DG
46.4
49
48
7.8
7.7
dB
dB
Bits
Bits
dB
dB
–49.5
dB
dB
dB
dB
Degree
%
47.8
49
48
–62
–58
66
61
0.2
0.08
51.4
NTSC 40 IRE Mod Ramp
–2–
REV. D