AD9200
JP14
REFSENSE
EXTB
AVDD
JP1
JP2
JP10
R5
10k
AVDD
MODE
TP3
TP4
C3
0.1
F
TP1
JP15
JP16
REFBF
REFTF
C4
0.1
C5
10/10V
+
R6
10k
F
JP3
JP4
JP9
C6
0.1
F
VREF
AVDDCLK
JP22
TP5
B
1
GND
AVDD
EXTT
S5
GND
R35
4.99k
2
CLAMPIN
EXTT
3
JP11
TP6
A
R34
2k
JP6
CW
REFTS
GND
JP12
R36
4.99k
C36
0.1
C37
0.1
C38
0.1
C35
10/10V
U6
U6
B
F
F
F
1
2
TP7
5
6
REFBS
EXTB
GND
JP7
JP13
TP12
2
C30
B
A
T1–1T
4
1
1
0.1
F
AIN
S7
S6
2
3
2
J1
A
3
3
3
2
J5
A
R51
49.9
S8
ADC_CLK
B
1
R1
TP8
49.9
R4
49.9
6
P
S
CLK
1
JP8
REFBS
CM
TP13
T1
R52
49.9
TP9
R2
100
U6
JP26
3
4
C1
0.1
DUTCLK
F
TP10
DCIN
A
3
R3
100
2
S1
C2
47/10V
1
B
TP29
TP20
TP21
TP22
L4
U6 DECOUPLING
AVDDCLK
+3–5D
J9
C31
10/10V
C32
0.1
F
F
F
14
U6
L1
L2
L3
74AHC14
PWR
U6
8
9
C28
0.1
J2
J3
J4
DRVDD
AVDD
F
C22
0.1
C23
10/10V
GND
U6
U6
11
13
10
7
12
C24
0.1
C25
33/16V
+3–5A
C26
0.1
C27
10/10V
F
TP23 TP24 TP25 TP26 TP27 TP28
GND J6
GND J10
Figure 39b. Evaluation Board Schematic
REV. E
–19–