AD9042
transformer, a sine wave could have been used; however, note
that U5 requires T T L levels to function properly.
rate while not appreciably distorting the data waveform. Data is
latched in a pipeline configuration; a rising edge generates the
new AD9042 data sample, latches the previous data at the
converter output, and strobes the external data register over J3.
Power and ground must be applied to J3 to power the digital
logic section of the evaluation board.
AD9042 output data is latched using 74ACT 574 (U3, U4)
latches following 499 ohm series resistors. T he resistors limit
the current that would otherwise flow due to the digital output
slew rate. T he resistor value was chosen to represent a time
constant of ~25% of the data rate at 40 MHz. T his reduces slew
U3
74ACT574
U5
74AS00
U5
74AS00
+5VA
9
8
7
6
5
4
3
2
C14
0.1µF
12
13
14
15
16
17
18
19
B06
B07
B08
B09
B10
B11
8D
7D
6D
5D
4D
3D
2D
1D
8Q
7Q
6Q
5Q
4Q
4
1
6
3
BUFLAT
5
2
14
V
CC
R2
499Ω
8
U1
K1115
OUT
R3
499Ω
R4
499Ω
V
EE
R5
499Ω
H40DM
J3
T1
T1–1T
7
3Q
2Q
1Q
U2
AD9042
R15
R6
499Ω
100Ω
R7
499Ω
3
4
GND
GND
BNC
J1
40
1
2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V
B11
B10
B09
B08
B07
B06
B05
B04
(MSB) D11
2
1
1
2
GND
28
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
DV
CK
6
3
D10 27
D9 26
+5V
CC
GND
OE
1
4
GND
11
3
5
D8
D7
D6
4
ENCODE
ENCODE
25
24
23
6
5
7
GND
GND
6
8
GND
GND
AIN
C2
0.1µF
9
7
D5 22
D4 21
10
11
12
13
14
15
16
17
18
19
20
BNC
J2
8
BUFLAT
R1
60.4Ω
9
V
20
19
18
D3
D2
D1
OFFSET
R14
49.9Ω
B03
B02
10
11
V
REF
GND
GND
B01
C3
0.1µF
U4
74ACT574
AV
CC
+5VA 12
GND 13
(LSB) D0 17
B00
R13
499Ω
16
GND
NC
GND
GND
GND
GND
GND
R12
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
499Ω
+5VA
AV
CC
14
15
NC
R11
499Ω
B00
B01
B02
B03
B04
B05
8D
7D
6D
5D
4D
3D
2D
1D
8Q
7Q
6Q
5Q
4Q
R10
499Ω
NC = NO CONNECT
R9
499Ω
R8
499Ω
+5V
3Q
2Q
1Q
+
C6
10µF
C7
0.1µF
C11
0.1µF
C12
0.1µF
C13
0.1µF
C15
0.1µF
C16
0.1µF
GND
GND
+5VA
CK
OE
1
+
C4
10µF
C8
0.1µF
C9
0.1µF
C17
0.1µF
11
Figure 37. AD9042D/PCB Schem atic
Table I. AD 9042D /P CB Bill of Material
D escription
Item
Quantity
Reference
1
2
+5VA, GND
Banana Jack
2
3
4
5
6
7
8
9
10
11
12
13
14
10
2
1
2
1
12
1
1
1
1
C2–C3, C7–C9, C11–C17
C4, C6
J3
J1, J2
R1
R2–R13
R14
R15
T 1
U1
U2
U3, U4
U5
Ceramic Chip Capacitor 0805, 0.1 µF
T antalum Chip Capacitor 10 µF
40-Pin Double Row Male Header
BNC Coaxial PCB Connector
Surface Mount Resistor 1206, 60.4 ohms
Surface Mount Resistor 1206, 499 ohms
Surface Mount Resistor 1206, 49.9 ohms
Surface Mount Resistor 1206, 100 ohms
Surface Mount T ransformer Mini-Circuits T 1–1T
40.96 MHz Clock Oscillator
AD9042AD 12-Bit–41 MSPS ADC Converter
74ACT 574 Octal Latch
1
2
1
74AS00 Quad T wo Input NAND Gate
REV. A
–14–
ADI [ ADI ]
