AD8561–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS (@ V+ = +5.0 V, V– = VGND = 0 V, TA = +25؇C unless otherwise noted)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
INPUT CHARACTERISTICS
Offset Voltage
VOS
2.3
7
8
mV
mV
μV/°C
μA
–40°C ≤ TA ≤ +85°C
Offset Voltage Drift
Input Bias Current
ΔVOS/ΔT
IB
IB
IOS
4
–3
–3.5
VCM = 0 V
–40°C ≤ TA ≤ +85°C
VCM = 0 V
–6
–7
μA
Input Offset Current
Input Common-Mode Voltage Range VCM
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
4
μA
V
dB
V/V
pF
0.0
65
+3.0
CMRR
AVO
CIN
0 V ≤ VCM ≤ +3.0 V
RL = 10 kΩ
85
3000
3.0
LATCH ENABLE INPUT
Logic “1” Voltage Threshold
Logic “0” Voltage Threshold
Logic “1” Current
Logic “0” Current
Latch Enable
VIH
VIL
IIH
IIL
2.0
1.65
1.60
–0.3
–2
V
V
μA
μA
0.8
VLH = 3.0 V
VLL = 0.3 V
–1.0
–4
Pulsewidth
Setup Time
Hold Time
tPW(E)
tS
tH
6
1
1.2
ns
ns
ns
DIGITAL OUTPUTS
Logic “1” Voltage
Logic “1” Voltage
Logic “0” Voltage
VOH
VOH
VOL
IOH = –50 μA, ΔVIN > 250 mV
IOH = –3.2 mA, ΔVIN > 250 mV
IOL = 3.2 mA, ΔVIN > 250 mV
3.5
2.4
V
V
V
3.5
0.25
0.4
DYNAMIC PERFORMANCE
Propagation Delay
tP
tP
200 mV Step with 100 mV Overdrive
–40°C ≤ TA ≤ +85°C
100 mV Step with 5 mV Overdrive
6.75
8
8
9.8
13
ns
ns
ns
Propagation Delay
Differential Propagation Delay
(Rising Propagation Delay vs.
Falling Propagation Delay)
Rise Time
ΔtP
100 mV Step with 100 mV Overdrive1
20% to 80%
80% to 20%
0.5
3.8
1.5
2.0
ns
ns
ns
Fall Time
POWER SUPPLY
Power Supply Rejection Ratio
Positive Supply Current
PSRR
I+
+4.5 V ≤ V+ ≤ +5.5 V
–40°C ≤ TA ≤ +85°C
50
65
4.5
dB
6.0
7.5
3.3
3.8
4.5
5.5
mA
mA
mA
mA
mA
mA
Ground Supply Current
Analog Supply Current
IGND
I–
VO = 0 V, RL =
∞
2.2
2.3
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
NOTES
1 Guaranteed by design.
Specifications subject to change without notice.
Rev. A
–2–