AD8541/AD8542/AD8544
OUTLINE DIMENSIONS
2.90 BSC
5.10
5.00
4.90
4
5
1.60 BSC
1
2
3
2.80 BSC
4.50
4.40
4.30
14
8
PIN 1
0.95 BSC
1.30
1.15
0.90
1.90
BSC
6.40
BSC
1
7
PIN 1
1.05
1.00
0.80
0.65
BSC
1.20
MAX
0.15
0.05
0.30
0.19
1.45 MAX
0.22
0.08
10°
5°
0°
0.60
0.45
0.30
0.20
0.09
0.15 MAX
0.50
0.30
SEATING
PLANE
SEATING
COPLANARITY
PLANE
0.10
8°
0°
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
COMPLIANT TO JEDEC STANDARDS MO-178-A A
Figure 41. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Figure 42. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
2.20
2.00
1.80
1.35
1.25
1.15
PIN 1
1.00
0.90
0.70
5
1
2
4
3
8.75 (0.3445)
8.55 (0.3366)
14
1
8
7
2.40
2.10
1.80
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
0.65 BSC
1.10
0.80
0.40
0.10
0.46
0.36
0.26
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
0.50 (0.0197)
0.25 (0.0098)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
45°
0.10 MAX
0.30
0.15
SEATING
PLANE
0.22
0.08
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AA
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
Figure 44. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
Rev. F | Page 16 of 20
060606-A