AD8531/AD8532/AD8534
OUTLINE DIMENSIONS
2.20
2.00
1.80
1.35
1.25
1.15
2.40
2.10
1.80
5
1
4
3
2
PIN 1
1.00
0.90
0.70
0.65 BSC
0.40
0.10
1.10
0.80
0.46
0.36
0.26
0.30
0.15
0.22
0.08
0.10 M
AX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 47. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
PIN 1
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.22
0.08
10°
5°
0°
0.15 MAX
0.50
0.30
0.60
0.45
0.30
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 48. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 49. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Rev. F | Page 17 of 20
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