AD8367
2.2Ω
5V
10nF
10nF
C2
V
INTO A
OUT
0.27μF
200Ω LOAD
AD8367
C
10nF
HP
R
100Ω
1
2
3
4
5
6
7
ICOM
ICOM 14
HPFL 13
VPSI 12
VPSO 11
VOUT 10
HP
U2
AD8361
VPOS
ENBL
INPT
J1
U1
10nF
0.1μF
1
2
3
4
SREF
8
7
6
5
INPUT
R6
57.6Ω
R1
200kΩ
IREF
RFIN
VRMS
FLTR
MODE
GAIN
DETO
ICOM
DECL
9
8
PWDN COMM
C5
10nF
C1
3.3nF
OCOM
R3
V
g
20pF
82kΩ
R2
150kΩ
V
AGC
4
2
3
Vrms
R4
33kΩ
U3
AD820
6
12kΩ
R5
10kΩ
V
SET
0.1μF
7
5V
Figure 38. Example of Using an External Detector to Form an AGC Loop
The component values shown in Figure 38 were chosen for a
64-QAM signal at 500 kS/s at a carrier frequency of 150 MHz.
The response time of the loop as shown is roughly 5 ms for
an abrupt input level change of 40 dB. Figure 41 shows the
dynamic performance of the loop with a step-modulated
CW signal applied to the input for a VSET of about 1 V.
Note that in this circuit the AD8367’s MODE pin must be
pulled high to obtain correct feedback polarity because the
integrator inverts the polarity of the feedback signal.
The relationship between the setpoint voltage and the rms
output voltage of the AD8367 is
R1 + 225
225 × 7.5
For a linear-in-dB response, detectors such as the AD8318 or
the AD8362 can be used in place of the AD8361.
VOUT−RMS =VSET
×
(6)
4.0
where 225 is the input resistance of the AD8361 and 7.5 is its
conversion gain. For R1 = 200 Ω, this reduces to VOUT –RMS = VSET
3.5
× 0.25.
3.0
10MHz
Capacitor C2 sets the averaging time for the rms detector. This
should be made long enough to provide sufficient smoothing of
the detector’s output in the presence of the modulation on the
RF signal. A level fluctuation of less than 1 dB (<5% to 10%) p-p
at the AD8361’s output is a reasonable value. A considerably
longer time constant needlessly lowers the AGC bandwidth,
while a short time constant can degrade the accuracy of the
true-rms measurement process. Components C1, R2, and R3
set the control loop’s bandwidth and stability. The maximum
stable loop bandwidth is limited by the rms detector’s averaging
time constant as previously discussed.
2.5
380MHz
2.0
1.5
1.0
0.5
0
–20
–15
–10
–5
0
5
10
POUT (dBm INTO 200Ω)
Figure 39. AGC Setpoint Voltage vs. Output Power
(QPSK: 4.096 MS/s; α = 0.22; 1 User)
For an input signal consisting of a 4.096 MS/s QPSK modulated
carrier, the relationship between VSET and the output power for
this setup is shown in Figure 39. The exponential shape reflects
the linear-in-magnitude response of the AD8361. The adjacent
channel power ratio (ACPR) as a function of output power is
illustrated in Figure 40. The minima occur where the distortion
and integrated noise powers cross over.
Rev. A | Page 17 of 24
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