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AD8367ARU 参数 Datasheet PDF下载

AD8367ARU图片预览
型号: AD8367ARU
PDF下载: 下载PDF文件 查看货源
内容描述: 500 MHz时,呈线性dB的VGA与AGC检波器 [500 MHz, Linear-in-dB VGA with AGC Detector]
分类和应用:
文件页数/大小: 24 页 / 497 K
品牌: AD [ ANALOG DEVICES ]
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500 MHz, Linear-in-dB VGA
with AGC Detector
AD8367
FEATURES
Broad-range analog variable gain: −2.5 dB to +42.5 dB
3 dB cutoff frequency of 500 MHz
Gain up and gain down modes
Linear-in-dB, scaled 20 mV/dB
Resistive ground referenced input
Nominal Z
IN
= 200 Ω
On-chip, square-law detector
Single-supply operation: 2.7 V to 5.5 V
FUNCTIONAL BLOCK DIAGRAM
VPSI
12
VPSO
11
ENBL
2
14
ICOM
ICOM
1
INPT
3
AD8367
9-STAGE ATTENUATOR BY 5dB
BIAS
9
DECL
13
HPFL
g
m
CELLS
SQUARE
LAW
DETECTOR
10
VOUT
GAUSSIAN INTERPOLATOR
ICOM
7
8
4
5
6
OCOM
02710-001
APPLICATIONS
Cellular base stations
Broadband access
Power amplifier control loops
Complete, linear IF AGC amplifiers
High speed data I/O
MODE
GAIN
DETO
Figure 1.
GENERAL DESCRIPTION
The AD8367 is a high performance 45 dB variable gain
amplifier with linear-in-dB gain control for use from low
frequencies up to several hundred megahertz. The range,
flatness, and accuracy of the gain response are achieved using
Analog Devices’ X-AMP® architecture, the most recent in a
series of powerful proprietary concepts for variable gain
applications, which far surpasses what can be achieved using
competing techniques.
The input is applied to a 9-stage, 200 Ω resistive ladder network.
Each stage has 5 dB of loss, giving a total attenuation of 45 dB.
At maximum gain, the first tap is selected; at progressively
lower gains, the tap moves smoothly and continuously toward
higher attenuation values. The attenuator is followed by a
42.5 dB fixed gain feedback amplifier—essentially an
operational amplifier with a gain bandwidth product of
100 GHz—and is very linear, even at high frequencies. The
output third order intercept is +20 dBV at 100 MHz (+27 dBm,
re 200 Ω), measured at an output level of 1 V p-p with V
S
= 5 V.
The analog gain-control input is scaled at 20 mV/dB and runs
from 50 mV to 950 mV. This corresponds to a gain of −2.5 dB
to +42.5 dB, respectively, when the gain up mode is selected and
+42.5 dB to −2.5 dB, respectively, when gain down mode is
selected. The gain down, or inverse, mode must be selected
when operating in AGC in which an integrated square-law
detector with an internal setpoint is used to level the output to
354 mV rms, regardless of the crest factor of the output signal.
A single external capacitor sets up the loop averaging time.
The AD8367 can be powered on or off by a voltage applied to
the ENBL pin. When this voltage is at a logic LO, the total
power dissipation drops to the milliwatt range. For a logic HI,
the chip powers up rapidly to its normal quiescent current of
26 mA at 25°C. The AD8367 is available in a 14-lead TSSOP
package for the industrial temperature range of −40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.