AD8320
V
= 12V
V
= 5V
100mV
1.25V
5mV
CC
CC
V
= 12V
CC
MAX GAIN
= 0V p-p
MAX GAIN
= 0V p-p
F = 40MHz
MAX GAIN
V
V
IN
OUT
V
IN
V
V
OUT
OUT
CLK
V
IN
PD
75nsec
DATEN
50V0mV
5V
20nsec
5V
250nsec
Figure 33. Overload Recovery
Figure 32. Clock Feedthrough
Figure 31. Power-Up/Power-Down
Glitch
V
= 12V, F = 40MHz
V
= 12V, F = 40MHz
CC
MIN TO MAX GAIN
= .310V p-p
2.50V
V
2.50V
V
= 12V
2.00V
V
CC
CC
MAX GAIN
F = 40MHz
MAX GAIN
V
IN
V
OUT
OUT
OUT
V
V
IN
IN
DATEN
5V
15V
20nsec
20nsec
250mV
20nsec
Figure 35. Output Settling Tim e Due
to Input Change
Figure 36. Output Settling Tim e Due
to Gain Change
Figure 34. Overload Recovery
80
90
120
V
= 5V
V
= 5V, PD = 0
CC
CC
R
= 115⍀
V
= 12V, PD = 1
= 5V, PD = 1
T
CC
V
= 5V, PD = 1
100
80
60
40
20
0
CC
80
70
70
V
V
CC
60
50
40
V
= 12V, PD = 1
CC
V
= 12V, PD = 0
CC
= 12V, PD = 0
= 5V, PD = 0
CC
60
50
V
CC
100k
1M
10M
100M
100k
1M
10M
100M
1G
–50
–25
0
25
50
75
100
FREQUENCY – Hz
FREQUENCY – Hz
TEMPERATURE – ؇C
Figure 38. Output Im pedance vs.
Frequency
Figure 37. Input Im pedance vs.
Frequency
Figure 39. Supply Current vs.
Tem perature
–8–
REV. 0
ADI [ ADI ]
