AD8315
(PRECISE GAIN
CONTROL)
(PRECISE SLOPE
CONTROL)
(ELIMINATES
GLITCH)
VPOS
ENBL
LOW NOISE
BAND GAP
REFERENCE
OUTPUT
ENABLE
DELAY
LOW NOISE
GAIN BIAS
(CURRENT-MODE SIGNAL)
VAPC
1.35
HI-Z
DET
DET
DET
DET
DET
LOW NOISE (25nV/ Hz)
RAIL-TO-RAIL BUFFER
RFIN
FLTR
10dB
10dB
10dB
10dB
(CURRENT-
NULLING
MODE)
(CURRENT-MODE
FEEDBACK)
VSET
V-I
23mV/dB
OFFSET
COMP’N
INTERCEPT
POSITIONING
250mV to
1.4V = 50dB
(SMALL INTERNAL
FILTER CAPACITOR
FOR GHz RIPPLE)
COMM
(PADDLE)
(WEAK GM STAGE)
Figure 1. Block Schematic
The intercept need not correspond to a physically realizable part
of the signal range for the log amp. Thus, the specified intercept
is –70 dBV, at 0.1 GHz, whereas the smallest input for accurate
measurement (a +1 dB error, see Table I) at this frequency is
higher, being about –58 dBV. At 2.5 GHz, the +1 dB error point
shifts to –64 dBV. This positioning of the intercept is deliberate
and ensures that the VSET voltage is within the capabilities of cer-
tain DACs, whose outputs cannot swing below 200 mV. Figure 2
shows the 100 MHz response of the AD8315; the vertical axis
represents not the output (at pin VAPC) but the value required
at the power control pin VSET to null the control loop. This
will be explained next.
law detector cell that converts the RF signal voltages to a fluctu-
ating current having an average value that increases with signal
level. A further passive detector stage is added before the first
stage. These five detectors are separated by 10 dB, spanning
some 50 dB of dynamic range. Their outputs are each in the
form of a differential current, making summation a simple mat-
ter. It is readily shown that the summed output can closely
approximate a logarithmic function. The overall accuracy at the
extremes of this total range, viewed as the deviation from an
ideal logarithmic response, that is, the log conformance error, can
be judged by reference to TPC 4, which shows that errors across
the central 40 dB are moderate. Other performance curves show
how conformance to an ideal logarithmic function varies with
supply voltage, temperature, and frequency.
1.5
1.416V @ –11dBV
In a device intended for measurement applications, this current
would then be converted to an equivalent voltage, to provide the
log(VIN) function shown in Equation 1. However, the design of the
AD8315 differs from standard practice in that its output needs
to be a low noise control voltage for an RF power amplifier, not
a direct measure of the input level. Further, it is highly desirable
that this voltage be proportional to the time-integral of the error
between the actual input VIN and a dc voltage VSET (applied to
Pin 3, VSET) which defines the setpoint, that is, a target value
for the power level, typically generated by a D/A converter.
B
/d
1.0
V
m
= 24
E
P
O
ACTUAL
L
S
0.5
0.288V @ –58dBV
This is achieved by converting the difference between the sum of
the detector outputs (still in current form) and an internally gener-
ated current proportional to VSET to a single-sided current-mode
signal. This, in turn, is converted to a voltage (at Pin 4, FLTR, the
low-pass filter capacitor node), to provide a close approximation
to an exact integration of the error between the power present in
the termination at the input of the AD8315 and the setpoint
voltage. Finally, the voltage developed across the ground-referenced
filter capacitor CFLT is buffered by a special low noise amplifier
of low voltage gain (¥1.35) and presented at Pin 7 (VAPC) for
use as the control voltage for the RF power amplifier. This buffer
can provide “rail-to-rail” swings and can drive a substantial load
current, including large capacitors. Note: The RF power is assumed
to increase monotonically with an increasingly positive delivered
by the amplifier under control of the AD8315 voltage on its
APC control pin.
–70dBV
IDEAL
1mV
–60dBV
–47dBm
0
100ꢁV
–80dBV
–67dBm
10mV
–40dBV
–27dBm
100mV
1V (RMS)
0dBV
–20dBV
–7dBm +13dBm (RE 50ꢀ)
V
, dBV , P
IN
IN IN
Figure 2. Basic Calibration of the AD8315 at 0.1 GHz
Controller-Mode Log Amps
The AD8315 combines the two key functions required for the
measurement and control of the power level over a moderately
wide dynamic range. First, it provides the amplification needed to
respond to small signals in a chain of four amplifier/limiter cells
(see Figure 1), each having a small signal gain of 10 dB and a
bandwidth of approximately 3.5 GHz. At the output of each of
these amplifier stages is a full-wave rectifier, essentially a square-
REV. B
–9–
ADI [ ADI ]
