AD8314
2.3
0mA
2mA
2.3
2.2
4mA
2.2
SHADING INDICATES
±3 SIGMA
2.1
2.1
V
DN
(V)
V
DN
(V)
01086-022
2.0
6mA
1.9
2.0
1.9
1.8
1.8
2.8
2.9
3.0
3.1
V
S
(V)
3.2
3.3
3.4
3.5
2.8
2.9
3.0
3.1
V
S
(V)
3.2
3.3
3.4
3.5
Figure 22. Maximum V
DN
Voltage vs. V
S
by Load Current
Figure 25. Maximum V
DN
Voltage vs. V
S
with 3 mA Load
V
UP
AVERAGE: 128 SAMPLES
AVERAGE: 128 SAMPLES
200mV PER
VERTICAL
DIVISION
V
DN
V
UP
500mV/VERTICAL
DIVISION
V
DN
GND
V
UP
GND
V
UP
500mV/VERTICAL
DIVISION
2V PER
VERTICAL
DIVISION
01086-023
V
DN
GND
VPOS AND ENABLE
2V PER
VERTICAL
DIVISION
100ns PER
HORIZONTAL
DIVISION
01086-026
VPOS AND ENABLE
GND
1µs PER
HORIZONTAL
DIVISION
GND
Figure 23. Power-On and Power-Off Response, Measurement Mode
TRIG
OUT
Figure 26. Power-On Response, V
DN
, Controller Mode with VSET Held Low
TRIG
OUT
HP8648B
SIGNAL
GENERATOR
–33dBV
RF OUT
10MHz REF OUTPUT
EXT TRIG
HP8116A
PULSE
GENERATOR
PULSE
OUT
HP8648B
SIGNAL
GENERATOR
RF OUT
10MHz REF OUTPUT
EXT TRIG
HP8112A
PULSE
GENERATOR
PULSE
OUT
AD811
49.9Ω
AD811
49.9Ω
1 RFIN
52.3Ω
2 ENBL
3 VSET
NC 4 FLTR
VPOS 8
V_DN 7
V_UP 6
COMM 5
732Ω
TEK P6204
FET PROBE
TEK P6204
FET PROBE
TRIG
1 RFIN
52.3Ω
2 ENBL
0.2
3 VSET
NC 4 FLTR
01086-024
VPOS 8
V_DN 7
V_UP 6 NC
COMM 5
732Ω
TEK P6204
FET PROBE
TRIG
TEK
TDS784C
SCOPE
AD8314
TEK
TDS784C
SCOPE
AD8314
01086-025
1.7
2.7
1.7
2.7
NC = NO CONNECT
NC = NO CONNECT
Figure 24. Test Setup for Power-On and Power-Off Response
Figure 27. Test Setup for Power-On Response at V_DN Output,
Controller Mode with VSET Pin Held Low
Rev. B | Page 9 of 20
01086-027
AD [ ANALOG DEVICES ]
