AD8314
APPLICATIONS
V_DN, which is generally not used when the AD8314 is used in
measurement mode, is essentially an inverted version of V_UP.
The voltage on V_UP and V_DN are related by
BASIC CONNECTIONS
Figure 31 shows connections for the basic measurement mode.
A supply voltage of 2.7 V to 5.5 V is required. The supply to the
VPOS pin should be decoupled with a low inductance 0.1 μF
surface-mount ceramic capacitor. A series resistor of about 10 Ω
can be added; this resistor slightly reduces the supply voltage to the
AD8314 (maximum current into the VPOS pin is approximately
9 mA when V_DN is delivering 5 mA). Its use should be
avoided in applications where the power supply voltage is very
low (that is, 2.7 V). A series inductor provides similar power
supply filtering with minimal drop in supply voltage.
V
DN = 2.25 V − 2 VUP
While V_DN can deliver up to 6 mA, the load resistance on
V_UP should not be lower than 10 kΩ in order that the full-
scale output of 1 V can be generated with the limited available
current of 200 μA maximum. Figure 32 shows the logarithmic
conformance under the same conditions.
1.2
1.0
0.8
0.6
0.4
0.2
3
V
= 3V
S
T
R
= 52.3Ω
0.1µF
52.3Ω
2
±1dB DYNAMIC RANGE
VPOS
V_DN
8
7
6
5
1
2
3
4
RFIN
V
V
INPUT
S
OPTIONAL
(SEE TEXT)
1
V
S
ENBL
DN
AD8314
0
V_UP
V
VSET
UP
–1
–2
FLTR
COMM
C
F
OPTIONAL
(SEE TEXT)
±3dB DYNAMIC RANGE
INTERCEPT
–50 –40
INPUT AMPLITUDE (dBV)
Figure 31. Basic Connections for Operation in Measurement Mode
0
–70
–3
–60
–30
–20
–10
0
The ENBL pin is here connected to VPOS. The AD8314 can be
disabled by pulling this pin to ground when the chip current is
reduced to about 20 μA from its normal value of 4.5 mA. The
logic threshold is around +VS/2 and the enable function occurs
in about 1.5 μs. Note, however, further settling time is generally
needed at low input levels.
(–47dBm)
(+3dBm)
Figure 32. VUP and Log Conformance Error vs.
Input Level vs. Input Level at 900 MHz
TRANSFER FUNCTION IN TERMS OF SLOPE AND
INTERCEPT
The transfer function of the AD8314 is characterized in terms
of its slope and intercept. The logarithmic slope is defined as the
change in the RSSI output voltage for a 1 dB change at the input.
For the AD8314, slope is nominally 21.5 mV/dB. Therefore, a
10 dB change at the input results in a change at the output of
approximately 215 mV. Log conformance plot, Figure 32, shows
the range over which the device maintains its constant slope.
The dynamic range can be defined as the range over which the
error remains within a certain band, usually 1 dB or 3 dB. In
Figure 32 for example, the 1 dB dynamic range is approximately
50 dB (from −13 dBV to −63 dBV).
The AD8314 has an internal input coupling capacitor. This
eliminates the need for external ac coupling. A broadband input
match is achieved in this example by connecting a 52.3 Ω resistor
between RFIN and ground. This resistance combines with the
internal input impedance of approximately 3 kΩ to give an
overall broadband input resistance of 50 Ω. Several other
coupling methods are possible, which are described in the
Input Coupling Options section.
The measurement mode is selected by connecting VSET to
V_UP, which establishes a feedback path and sets the
logarithmic slope to its nominal value. The peak voltage range
of the measurement extends from −58 dBV to −13 dBV at
0.9 GHz, and only slightly less at higher frequencies up to
2.5 GHz. Therefore, using the 50 Ω termination, the equivalent
power range is −45 dBm to 0 dBm. At a slope of 21.5 mV/dB,
this would amount to an output span of 967 mV. Figure 32
shows the transfer function for V_UP at a supply voltage of 3 V
and input frequency of 0.9 GHz.
Rev. B | Page 12 of 20
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