AD822
100
100
90
80
80
PHASE
OPEN-LOOP GAIN – dB
80
PHASE MARGIN IN DEGREES
COMMON-MODE REJECTION – dB
70
V
S
= 0V, 3V
60
50
40
30
20
10
V
S
=
±15V
60
GAIN
40
60
V
S
= 0V, 5V
40
20
R
L
= 2kΩ
C
L
= 100pF
20
0
0
–20
10
100
1k
10k
100k
FREQUENCY – Hz
1M
–20
10M
0
10
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
Figure 13. Open-Loop Gain and Phase Margin vs.
Frequency
Figure 16. Common-Mode Rejection vs. Frequency
1k
COMMON-MODE ERROR VOLTAGE – mV
A
CL
= +1
V
S
=
±15V
5
100
OUTPUT IMPEDANCE –
Ω
4
10
3
NEGATIVE
RAIL
+25
°
C
POSITIVE
RAIL
1
2
0.1
1
+125
°
C
0
–1
–55
°
C
+125
°
C
–55
°
C
0.01
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
0
1
2
3
COMMON-MODE VOLTAGE FROM SUPPLY RAILS – Volts
Figure 14. Output Impedance vs. Frequency
Figure 17. Absolute Common-Mode Error vs. Common-
Mode Voltage from Supply Rails (V
S
– V
CM
)
+16
+12
1000
OUTPUT SATURATION VOLTAGE – mV
OUTPUT SWING FROM 0 TO
±Volts
+8
+4
0
–4
–8
1%
100
V
S
– V
OH
V
OL
– V
S
10
0.1%
0.01%
ERROR
1%
–12
–16
0.0
1.0
2.0
3.0
SETTLING TIME –
µs
4.0
5.0
0
0.001
0.01
0.1
1
LOAD CURRENT – mA
10
100
Figure 15. Output Swing and Error vs. Settling Time
Figure 18. Output Saturation Voltage vs. Load Current
REV. A
–9–
AD [ ANALOG DEVICES ]
