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AD822BRZ 参数 Datasheet PDF下载

AD822BRZ图片预览
型号: AD822BRZ
PDF下载: 下载PDF文件 查看货源
内容描述: 单电源,轨到轨低功耗FET输入运算放大器 [Single-Supply, Rail-to-Rail Low Power FET-Input Op Amp]
分类和应用: 运算放大器放大器电路光电二极管PC
文件页数/大小: 28 页 / 597 K
品牌: ADI [ ADI ]
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AD822  
APPLICATION NOTES  
100k  
10k  
1k  
INPUT CHARACTERISTICS  
WHENEVER JOHNSON NOISE IS GREATER THAN  
AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE  
CONSIDERED NEGLIGIBLE FOR APPLICATION.  
In the AD822, n-channel JFETs are used to provide a low offset,  
low noise, high impedance input stage. Minimum input  
common-mode voltage extends from 0.2 V below −VS to ± V  
less than +VS. Driving the input voltage closer to the positive  
rail causes a loss of amplifier bandwidth (as can be seen by  
comparing the large signal responses shown in Figure 34 and  
Figure 37) and increased common-mode voltage error as  
illustrated in Figure 20.  
1kHz  
RESISTOR JOHNSON  
NOISE  
100  
10  
10Hz  
1
The AD822 does not exhibit phase reversal for input voltages up  
to and including +VS. Figure 42 shows the response of an  
AD822 voltage follower to a 0 V to ꢀ V (+VS) square wave input.  
The input and output are superimposed. The output tracks the  
input up to +VS without phase reversal. The reduced bandwidth  
above a 4 V input causes the rounding of the output waveform.  
For input voltages greater than +VS, a resistor in series with the  
AD822s noninverting input prevents phase reversal, at the  
expense of greater input voltage noise. This is illustrated in  
Figure 42.  
AMPLIFIER-GENERATED  
NOISE  
0.1  
10k  
100k  
10M  
100M  
1G  
10G  
1M  
SOURCE IMPEDANCE ()  
Figure 43. Total Noise vs. Source Impedance  
OUTPUT CHARACTERISTICS  
The AD822s unique bipolar rail-to-rail output stage swings within  
ꢀ mV of the negative supply and ±0 mV of the positive supply with  
no external resistive load. The AD822s approximate output  
saturation resistance is 40 Ω sourcing and 20 Ω sinking. This can be  
used to estimate output saturation voltage when driving heavier  
current loads. For instance, when sourcing ꢀ mA, the saturation  
voltage to the positive supply rail is 200 mV; when sinking ꢀ mA,  
the saturation voltage to the negative rail is ±00 mV.  
Since the input stage uses n-channel JFETs, input current  
during normal operation is negative; the current flows out from  
the input terminals. If the input voltage is driven more positive  
than +VS – 0.4 V, then the input current reverses direction as  
internal device junctions become forward biased. This is  
illustrated in Figure 7.  
The amplifiers open-loop gain characteristic changes as a  
function of resistive load, as shown in Figure ±0 to Figure ±3.  
For load resistances over 20 kΩ, the AD822’s input error voltage  
is virtually unchanged until the output voltage is driven to  
±80 mV of either supply.  
A current limiting resistor should be used in series with the  
input of the AD822 if there is a possibility of the input voltage  
exceeding the positive supply by more than 300 mV, or if an  
input voltage is applied to the AD822 when ±VS = 0. The  
amplifier is damaged if left in that condition for more than  
±0 seconds. A ± kΩ resistor allows the amplifier to withstand up  
to ±0 V of continuous overvoltage and increases the input  
voltage noise by a negligible amount.  
If the AD822s output is overdriven so as to saturate either of  
the output devices, the amplifier recovers within 2 ꢁs of its  
input returning to the amplifier’s linear operating region.  
Direct capacitive loads interact with the amplifiers effective  
output impedance to form an additional pole in the amplifiers  
feedback loop, which can cause excessive peaking on the pulse  
response or loss of stability. Worst case is when the amplifier is  
used as a unity gain follower. Figure 44 shows the AD822s pulse  
response as a unity gain follower driving 3ꢀ0 pF. This amount of  
overshoot indicates approximately 20° of phase margin—the  
system is stable, but nearing the edge. Configurations with less  
loop gain, and as a result less loop bandwidth, are much less  
sensitive to capacitance load effects.  
Input voltages less than –VS are a completely different story. The  
amplifier can safely withstand input voltages 20 V below the  
negative supply voltage as long as the total voltage from the  
positive supply to the input terminal is less than 36 V. In  
addition, the input stage typically maintains picoampere (pA)  
level input currents across that input voltage range.  
The AD822 is designed for ±3 nV/√Hz wideband input voltage  
noise and maintains low noise performance to low frequencies  
(refer to Figure ±4). This noise performance, along with the  
AD822s low input current and current noise, means that the  
AD822 contributes negligible noise for applications with source  
resistances greater than ±0 kΩ and signal bandwidths greater  
than ± kHz. This is illustrated in Figure 43.  
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