AD822
AP P LICATIO NS
Table I. AD 822 In Am p P erform ance
Single Supply Voltage-to-Fr equency Conver ter
T he circuit shown in Figure 44 uses the AD822 to drive a low
power timer, which produces a stable pulse of width t1. T he
positive going output pulse is integrated by R1-C1 and used as
one input to the AD822, which is connected as a differential
integrator. T he other input (nonloading) is the unknown
voltage, VIN. T he AD822 output drives the timer trigger input,
closing the overall feedback loop.
P aram eters
VS = 3 V, 0 V
VS = ؎5 V
CMRR
74 dB
80 dB
Common-Mode
Voltage Range
3 dB BW, G = 10
G = 100
–0.2 V to +2 V –5.2 V to +4 V
180 kHz
18 kHz
180 kHz
18 kHz
tSET T LING
2 V Step (VS = 0 V, 3 V)
5 V (VS = ±5 V)
Noise @ f = 1 kHz, G = 10
2 µs
+10V
5 µs
U4
C5
270 nV/√Hz
270 nV/√Hz
2.2 µV/√Hz
1.15 mA
REF-02
0.1µF
2
VREF = 5V
6
G = 100 2.2 µV/√Hz
CMOS
ISUPPLY (T otal)
1.10 mA
3
5
RSCALE **
10k
OUT2
OUT1
74HCO4
C3
0.1µF
U3A
2
4
U3B
4
3
1
5µs
U2
CMOS 555
0.01µF, 2%
100
90
4
8
R2
R3*
499k, 1%
U1
116k
R
V+
C1
6
3
THR
OUT
1/2
2
7
TR
R1
AD822B
5
VIN
CV
DIS
499k, 1%
GND
C6
0V TO 2.5V
FULL SCALE
390pF
1
C2
5%
C4
0.01µF
0.01µF, 2%
10
(NPO)
0%
NOTES:
1V
fOUT = VIN /(VREF*t1), t1 = 1.1*R3*C6
= 25kHz fS AS SHOWN.
* = 1% METAL FILM, <50ppm/°C TC
** = 10%, 20T FILM, <100ppm/°C TC
Figure 45a. Pulse Response of In Am p to a 500 m V p-p
Input Signal; VS = +5 V, 0 V; Gain = 10
t1 = 33µs FOR fOUT = 20kHz @ VIN = 2.0V
R1
R2
9k
R3
1k
R4
1k
R5
9k
R6
Figure 44. Single Supply Voltage-to-Frequency Converter
OHMTEK
PART # 1043
VREF
90k
90k
T ypical AD822 bias currents of 2 pA allow megaohm-range
source impedances with negligible dc errors. Linearity errors on
the order of 0.01% full scale can be achieved with this circuit.
T his performance is obtained with a 5 volt single supply which
delivers less than 1 mA to the entire circuit.
G =10
G =100
G =100
G =10
+VS
1/2
0.1µF
Single Supply P rogram m able Gain Instrum entation Am plifier
T he AD822 can be configured as a single supply instrumenta-
tion amplifier that is able to operate from single supplies down
to 3 V, or dual supplies up to ±15 V. Using only one AD822
rather than three separate op amps, this circuit is cost and power
efficient. AD822 FET inputs’ 2 pA bias currents minimize offset
errors caused by high unbalanced source impedances.
6
2
1
8
7
1/2
AD822
RP
AD822
5
3
VOUT
VIN1
VIN2
4
1kΩ
RP
1kΩ
R6
R4 + R5
(G =10) VOUT = (VIN1 –VIN2) (1+
(G =100) VOUT = (VIN1 –VIN2) (1+
) +VREF
) +VREF
R5 + R6
R4
An array of precision thin-film resistors sets the in amp gain to
be either 10 or 100. T hese resistors are laser-trimmed to ratio
match to 0.01%, and have a maximum differential T C of
5 ppm/°C.
FOR R1 = R6, R2 = R5, AND R3 = R4
Figure 45b. A Single Supply Program m able
Instrum entation Am plifier
REV. A
–15–
ADI [ ADI ]
