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AD8139ACPZ-R2 参数 Datasheet PDF下载

AD8139ACPZ-R2图片预览
型号: AD8139ACPZ-R2
PDF下载: 下载PDF文件 查看货源
内容描述: 低噪声,轨到轨差分ADC驱动器 [Low Noise, Rail-to-Rail, Differential ADC Driver]
分类和应用: 驱动器运算放大器放大器电路
文件页数/大小: 24 页 / 686 K
品牌: ADI [ ADI ]
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AD8139  
THEORY OF OPERATION  
The AD8139 is a high speed, low noise differential amplifier  
fabricated on the Analog Devices second-generation eXtra Fast  
Complementary Bipolar (XFCB) process. It is designed to  
provide two closely balanced differential outputs in response to  
either differential or single-ended input signals. Differential  
gain is set by external resistors, similar to traditional voltage-  
feedback operational amplifiers. The common-mode level of  
the output voltage is set by a voltage at the VOCM pin and is  
independent of the input common-mode voltage. The AD8139  
has an H-bridge input stage for high slew rate, low noise, and  
low distortion operation and rail-to-rail output stages that  
provide maximum dynamic output range. This set of features  
allows for convenient single-ended-to-differential conversion, a  
common need to take advantage of modern high resolution  
ADCs with differential inputs.  
outputs of identical amplitude and exactly 180° out of phase. The  
output balance performance does not require tightly matched  
external components, nor does it require that the feedback factors  
of each loop be equal to each other. Low frequency output balance  
is limited ultimately by the mismatch of an on-chip voltage divider,  
which is trimmed for optimum performance.  
Output balance is measured by placing a well-matched resistor  
divider across the differential voltage outputs and comparing  
the signal at the midpoint of the divider with the magnitude of  
the differential output. By this definition, output balance is  
equal to the magnitude of the change in output common-mode  
voltage divided by the magnitude of the change in output  
differential-mode voltage:  
ΔVO, cm  
ΔVO, dm  
Output Balance =  
(3)  
TYPICAL CONNECTION AND DEFINITION OF  
TERMS  
The block diagram of the AD8139 in Figure 60 shows the  
external differential feedback loop (RF/RG networks and the  
differential input transconductance amplifier, GDIFF) and the  
internal common-mode feedback loop (voltage divider across  
VOP and VON and the common-mode input transconductance  
amplifier, GCM). The differential negative feedback drives the  
voltages at the summing junctions VAN and VAP to be essentially  
equal to each other.  
Figure 59 shows a typical connection for the AD8139, using  
matched external RF/RG networks. The differential input  
terminals of the AD8139, VAP and VAN, are used as summing  
junctions. An external reference voltage applied to the VOCM  
terminal sets the output common-mode voltage. The two  
output terminals, VOP and VON, move in opposite directions in a  
balanced fashion in response to an input signal.  
C
F
V
AN = VAP  
(4)  
The common-mode feedback loop drives the output common-  
mode voltage, sampled at the midpoint of the two 500 Ω resistors,  
to equal the voltage set at the VOCM terminal. This ensures that  
R
F
R
R
V
V
V
G
AP  
ON  
V
IP  
+
V
OCM  
R
V
AD8139  
L, dm  
O, dm  
+
VO, dm  
2
G
V
AN  
OP  
VOP = VOCM  
and  
+
(5)  
V
IN  
R
F
VO, dm  
2
C
VON =VOCM  
(6)  
F
Figure 59. Typical Connection  
R
R
F
G
V
IN  
The differential output voltage is defined as  
O, dm = VOP VON  
10pF  
V
(1)  
(2)  
+
+
G
O
V
OP  
Common-mode voltage is the average of two voltages. The  
output common-mode voltage is defined as  
500Ω  
500Ω  
MIDSUPPLY  
V
AN  
G
G
CM  
DIFF  
VOP + VON  
V
V
V
AP  
OCM  
VO, cm  
=
2
G
O
ON  
Output Balance  
Output balance is a measure of how well VOP and VON are  
matched in amplitude and how precisely they are 180° out of  
phase with each other. It is the internal common-mode feedback  
loop that forces the signal component of the output common-mode  
towards zero, resulting in the near perfectly balanced differential  
10pF  
V
IP  
R
G
R
F
Figure 60. Block Diagram  
Rev. B | Page 18 of 24