AD8131
APPLICATIONS
TWISTED-PAIR LINE DRIVER
3 V SUPPLY DIFFERENTIAL A-TO-D DRIVER
The AD8131 has on-chip resistors that provide for a gain of 2
without any external parts. Several on-chip resistors are
trimmed to ensure that the gain is accurate, the common-mode
rejection is good, and the output is well balanced. This makes
the AD8131 very suitable as a single-ended-to-differential
twisted-pair line driver.
Many newer ADCs can run from a single 3 V supply, which can
save significant system power. In order to increase the dynamic
range at the analog input, they have differential inputs, which
double the dynamic range with respect to a single-ended input.
An added benefit of using a differential input is that the
distortion can be improved.
Figure 40 shows a circuit of an AD8131 driving a twisted-pair
line, like a Category 3 or Category 5 (Cat3 or Cat5), that is
already installed in many buildings for telephony and data
communications. The characteristic impedance of such a
transmission line is usually about 100 Ω. The outstanding
balance of the AD8131 output will minimize the common-
mode signal and therefore the amount of EMI generated by
driving the twisted pair.
The low distortion and ability to run from a single 3 V supply make
the AD8131 suited as an A-to-D driver for some 10-bit, single-
supply applications. Figure 41 shows a schematic for a circuit for an
AD8131 driving an AD9203, a 10-bit, 40 MSPS ADC.
The common mode of the AD8131 output is set at midsupply
by the voltage divider connected to VOCM, and ac-bypassed with
a 0.1 μF capacitor. This provides for maximum dynamic range
between the supplies at the output of the AD8131. The 110 Ω
resistors at the AD8131 output, along with the shunt capacitors
form a one pole, low-pass filter for lowering noise and
antialiasing.
The two resistors in series with each output terminate the line at
the transmit end. Since the impedances of the outputs of the
AD8131 are very low, they can be thought of as a short-circuit,
and the two terminating resistors form a 100 Ω termination at
the transmit end of the transmission line. The receive end is
directly terminated by a 100 Ω resistor across the line.
3V
3V
+
10
F
0.1
F
0.1 F
28
2
DRVDD
AVDD
AINN
26
110Ω
This back-termination of the transmission line divides the
output signal by two. The fixed gain of 2 of the AD8131 will
create a net unity gain for the system from end to end.
3
20pF
8
2
LPF
AD8131
DIGITAL
OUTPUTS
AD9203
49.9Ω
V
OCM
0.1
F
1
In this case, the input signal is provided by a signal generator
with an output impedance of 50 Ω. This is terminated with a
49.9 Ω resistor near +DIN of the AD8131. The effective parallel
resistance of the source and termination is 25 Ω.The 24.9 Ω
resistor from −DIN to ground matches the +DIN source
impedance and minimizes any dc and gain errors.
25
20pF
+3V
AINP
AVSS
27
24.9Ω
6
110Ω
DRVSS
1
10kΩ
10kΩ
Figure 41. Test Circuit for AD8131 Driving an AD9203, 10-Bit, 40 MSPS ADC
If +DIN is driven by a low-impedance source over a short
distance, such as the output of an op amp, then no termination
resistor is required at +DIN. In this case, the −DIN can be directly
tied to ground.
Figure 42 shows an FFT plot that was taken from the combined
devices at an analog input frequency of 2.5 MHz and a 40 MSPS
sampling rate. The performance of the AD8131 compares very
favorably with a center-tapped transformer drive, which has
typically been the best way to drive this ADC. The AD8131 has
the advantage of maintaining dc performance, which a
transformer solution cannot provide.
+5V
+
10
μF
0.1
μF
49.9
Ω
3
8
2
5
49.9Ω
100Ω
RECEIVER
AD8131
4
6
1
24.9Ω
49.9
0.1
Ω
10μF
μ
F
+
–5V
Figure 40. Single-Ended-to-Differential 100 Ω Line Driver
Rev. B | Page 18 of 20
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