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AD8130ARMZ 参数 Datasheet PDF下载

AD8130ARMZ图片预览
型号: AD8130ARMZ
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本的270 MHz差分接收器放大器 [Low Cost 270 MHz Differential Receiver Amplifiers]
分类和应用: 模拟IC信号电路放大器光电二极管PC
文件页数/大小: 40 页 / 634 K
品牌: ADI [ ADI ]
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AD8129/AD8130  
Such a connection, also referred to as a cable-tap amplifier, can  
be simply made with an AD8130 (see Figure 143). The circuit is  
configured with unity gain, and if no output offset is desired,  
the REF pin is grounded. The negative differential input is  
connected directly to the shield of the cable (or an associated  
connector) at the point at which it wants to be tapped.  
EXTREME OPERATING CONDITIONS  
The AD8129/AD8130 are designed to provide high  
performance over a wide range of supply voltages. However,  
there are some extremes of operating conditions that have  
been observed to produce suboptimal results. One of these  
conditions occurs when the AD8130 is operated at unity gain  
with low supply voltage—less than approximately 4 V.  
+V  
AD8130  
At unity gain, the output drives FB directly. With supplies of  
VS less than approximately 4 V at unity gain, the output can  
drive FB’s voltage too close to the rail for the circuit to stay  
properly biased. This can lead to a parasitic oscillation.  
75Ω  
0.1  
μ
F
10μF  
3
7
1
8
+V  
+
+
PD  
S
6
V
OUT  
4
5
A way to prevent this is to limit the input signal swing with  
clamp diodes. Common silicon-junction signal diodes like the  
1N4148 have a forward bias of approximately 0.7 V when about  
1 mA of current flows through them. Two series pairs of such  
diodes connected antiparallel across the differential inputs can  
be used to clamp the input signal and prevent this condition. It  
should be noted that the REF input can also shift the output  
signal; therefore, this technique only works when REF is at  
ground or close to it (see Figure 145).  
–V  
S
2
VIDEO  
IN  
10μF  
0.1μF  
–V  
75Ω  
Figure 143. The AD8130 Can Tap the Video Signal at Any Point Along the  
Cable Without Loading the Signal.  
The center conductor connects to the positive differential input  
of the AD8130. The amplitude of the video signal at this point is  
unity, because it is between the two termination resistors. The  
AD8130 provides a high impedance to this signal so that the  
signal is not disturbed. A buffered unity-gain version of the  
video signal appears at the output.  
+V  
AD8130  
0.1  
μF  
10μF  
V
V
3
7
IN  
1N4148  
1
8
+V  
+
+
PD  
S
6
POWER-DOWN  
V
OUT  
4
5
IN  
–V  
The AD8129/AD8130 have a power-down pin that can be used  
to lower the quiescent current when the amplifier is not being  
S
2
PD  
used. A logic low level on the  
pin causes the part to power  
down. Because there is no ground pin on the AD8129/AD8130,  
there is no logic reference to interface to standard logic levels.  
10μF  
0.1μF  
–V  
PD  
For this reason, the reference level for the  
input is VS. If  
Figure 145. Clamping Diodes at the Input Limits the Input Swing Amplitude  
the AD8129/AD8130 are run with VS = 5 V, there is direct  
compatibility with logic families. However, if VS is higher than  
this, a level-shift circuit is needed to interface to conventional  
logic levels. A simple level-shifting circuit that is compatible  
with common logic families is presented in Figure 144.  
+V  
S
7
1kΩ  
+V  
S
3
PD  
4.99kΩ  
2N2222  
OR EQ  
LOW =  
POWER-DOWN  
AD8129/  
AD8130  
Figure 144. Circuit that Shifts the Logic Level When VS Is Not Equal to  
Approximately 5 V.  
Rev. C | Page 36 of 40