AD8113
Inputs and outputs should be preassigned to be either audio or
video. As described above, audio and video signals are treated
differently, so it is difficult to have the same AD8113 inputs or
outputs route audio or video signals in the same system at
different times. The various audio and video channels should
be configured as described in the above sections.
CREATING LARGER CROSSPOINT ARRAYS
The AD8113 is a high density building block for creating cross-
point arrays of dimensions larger than 16 × 16. Various features,
such as output disable and chip enable, are useful for creating
larger arrays.
The first consideration in constructing a larger crosspoint is to
determine the minimum number of devices required. The 16 × 16
architecture of the AD8113 contains 256 points, which is a
factor of 64 greater than a 4 × 1 crosspoint (or multiplexer). The
PC board area, power consumption, and design effort savings are
readily apparent when compared to using these smaller devices.
Video outputs that drive a terminated 75 Ω transmission line
(150 Ω equivalent load) will dissipate significantly more power
with 12 V supplies. An upper bound on power dissipation can
be approximated by the following method.
A video signal at the AD8113 output can have a maximum
value of 2 V. This is quite conservative, because most video
signals are about 700 mV peak at unity gain or 1.4 V peak after
a gain-of-two. A video signal only reaches this level when the video
content is at peak white, so this value is even more pessimistic.
For a nonblocking crosspoint, the number of points required is
the product of the number of inputs multiplied by the number
of outputs. Nonblocking requires that the programming of a given
input to one or more outputs does not restrict the availability of
that input to be a source for any other outputs.
Finally, a video signal will generally have some kind of sync and
blanking interval where its amplitude will be either 0 V (or black)
or very close to this level. The power dissipation will be much
lower during this period and this will occur at a very regular
duty cycle.
Some nonblocking crosspoint architectures will require more than
this minimum as calculated above. Also, there are blocking archi-
tectures that can be constructed with fewer devices than this
minimum. These systems have connectivity available on a statis-
tical basis that is determined when designing the overall system.
If the full 2 V signal is assumed to be present at 100% duty
cycle at the output, then the current in the output is 2 V/150 Ω
= 13.3 mA. If the positive supply is at 12 V, there will be a
10 V drop in the AD8113 output stage from the supply to the
output. This yields a power dissipated in the output of 133 mW
from one video load when running on supplies of 12 V. This
is by far a worst-case situation, and this power dissipation fac-
tor can be adjusted lower by adjusting for actual video levels,
sync-interval duty cycle, and average picture level considerations.
The basic concept in constructing larger crosspoint arrays is
to connect inputs in parallel in a horizontal direction and to
wire-OR the outputs together in the vertical direction. The
meaning of horizontal and vertical can best be understood by
looking at a diagram. Figure 11 illustrates this concept for a
32 × 32 crosspoint array that uses four AD8113s.
16
16
1k⍀
If too much power will be dissipated in this type of configuration,
it is possible to lower it by buffering the output. An AD8113
video output drives a divide-by-two resistive divider that is
made up of two 1 kΩ resistors. This presents a total load of
2 kΩ to the AD8113 outputs, which significantly reduces the
power dissipation. Refer to Figure 10.
IN 00–15
AD8113
16
AD8113
16
1k⍀
16 1k⍀
1k⍀
16
IN 16–31
AD8113
AD8113
+12V
+5V
TYPICAL
INPUT
TYPICAL
OUTPUT
16
16
16
16
+
AD8113
G = 2
10F
0.1F
1k⍀
1k⍀
75⍀
75⍀
3
2
7
TRANSMISSION
LINE
+
–12V
6
AD8057
Figure 11. 32 × 32 Audio Crosspoint Array Using Four
75⍀
75⍀
–
4
AD8113s
The inputs are individually assigned to each of the 32 inputs of
the two devices and a divider is used to normalize the channel
gain. The outputs are wire-ORed together in pairs. The output
from only one of a wire-ORed pair should be enabled at any
given time. The device programming software must be properly
written to cause this to happen.
1k⍀
1k⍀
10F
0.1F
+
–5V
Figure 10. Video Buffer Circuit
After this divider, the signal is now at a unity level because of
the channel gain of the AD8113 and the attenuation of the
divider. An AD8057 is configured as a gain-of-two buffer to
drive the terminated transmission line. The AD8058 is a dual
version of the AD8057.
Using additional crosspoint devices in the design can lower the
number of outputs that have to be wire-ORed together. Figure 12
shows a block diagram of a system using ten AD8113s to create
a nonblocking, gain-of-two, 128 × 16 crosspoint that restricts
the wire-ORing at the output to only four outputs.
The maximum supply voltage of the AD8057 is only about
6 V. If the only system supplies that are available are 12 V, a
higher voltage video op amp can be substituted for the AD8057.
Good candidates are the AD817 and AD818 or, if dual op amps
are needed, the AD826 and AD828.
Additionally, by using the lower eight outputs from each of the
two Rank 2 AD8113s, a blocking 128 × 32 crosspoint array can be
realized. There are, however, some drawbacks to this technique.
The offset voltages of the various cascaded devices will accumu-
–18–
REV. A
ADI [ ADI ]
