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AD8052ARM-REEL7 参数 Datasheet PDF下载

AD8052ARM-REEL7图片预览
型号: AD8052ARM-REEL7
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本,高速轨到轨放大器 [Low Cost, High Speed Rail-to-Rail Amplifiers]
分类和应用: 放大器
文件页数/大小: 16 页 / 270 K
品牌: ADI [ ADI ]
 浏览型号AD8052ARM-REEL7的Datasheet PDF文件第8页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第9页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第10页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第11页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第12页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第13页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第15页浏览型号AD8052ARM-REEL7的Datasheet PDF文件第16页  
AD8051/AD8052/AD8054  
CLK  
SLEEP  
INA-I  
0.33F  
0.01F  
22⍀  
؉V  
SELECT  
DD  
+5V  
10pF  
1k⍀  
22⍀  
INB-I  
10pF  
10F  
0.1F  
AD9201  
DATA OUT  
REFT-I  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
22⍀  
10F  
0.1F  
0.1F  
0.1F  
10F  
REFB-I  
50⍀  
AD8051  
AVSS  
REFSENSE  
1k⍀  
1k⍀  
V
REF  
0.1F  
10F  
0.1F  
؊5V  
AVDD  
؉5V  
10F  
0.1F  
REFB-Q  
REFT-Q  
0.1F  
10F  
0.1F  
D1  
D0  
0.1F  
22⍀  
؉5V  
DVDD  
DVSS  
INB-Q  
10pF  
0.1F  
10F  
22⍀  
INA-Q  
10pF  
THREE–STATE  
Figure 44. AD8051 Driving an AD9201, a 10-Bit 20 MSPS A/D Converter  
applied to the noninverting input of the AD8051. The amplifier  
output is 2 V p-p, which is the maximum input range of the  
AD9201. The 22 series resistor limits the maximum current  
that flows and helps to lower the distortion of the A/D.  
positive and negative with respect to the bias voltage applied to  
INB-I.  
With the sampling clock running at 20 MSPS, the A/D output  
was analyzed with a digital analyzer. Two input frequencies  
were used, 1 MHz and 9.5 MHz, which is just short of the  
Nyquist frequency. These signals were well filtered to minimize  
any harmonics.  
The AD9201 has differential inputs for each channel. These are  
designated the A and B inputs. The B inputs of each channel are  
connected to VREF (Pin 8) which supplies a positive reference  
of 2.5 V. Each of the B inputs has a small low pass filter that  
also helps to reduce distortion.  
Figure 45 shows the FFT response of the A/D for the case of  
1 MHz analog input. The SFDR is 71.66 dB and the A/D is  
producing 8.8 ENOB (effective number of bits). When the  
analog frequency was raised to 9.5 MHz, the SFDR was re-  
duced to 60.18 dB and the A/D operated with 8.46 ENOBs as  
shown in Figure 46. The inclusion of the AD8051 in the circuit  
had no worsening of the distortion performance of the AD9201.  
The output of the op amp is ac coupled into INA-I (Pin 2) via  
two parallel capacitors to provide good high frequency and low  
frequency coupling. The 1 kresistor references the signal to  
VREF that is applied to INB-I. Thus, INA-I will swing both  
10.0  
10.0  
PART#  
FFTSIZE 8192  
0
PART#  
0
5.0  
0.0  
5.0  
0.0  
FUND  
FUND  
FFTSIZE 8192  
FCLK  
FUND  
VIN  
20.0E؉6  
؊5.0  
؊10.0  
؊15.0  
FCLK  
FUND  
20.0E؉6  
؊5.0  
9.5E؉6  
؊10.0  
؊15.0  
؊20.0  
؊25.0  
؊30.0  
؊35.0  
؊40.0  
؊45.0  
؊50.0  
؊55.0  
؊60.0  
؊65.0  
؊70.0  
؊75.0  
؊80.0  
؊85.0  
؊90.0  
؊95.0  
؊100.0  
؊105.0  
؊110.0  
؊115.0  
؊120.0  
998.5E؉3  
؊0.51dB  
؊68.13  
54.97  
؊0.44dB  
VIN  
؊20.0  
؊25.0  
؊30.0  
THD  
؊57.08  
54.65  
THD  
SNR  
SNR  
SINAD  
ENOB  
SFDR  
2ND  
52.69  
SINAD  
ENOB  
SFDR  
54.76  
؊35.0  
؊40.0  
؊45.0  
؊50.0  
8.46  
8.80  
؊60.18  
؊60.18  
؊71.66  
؊74.53  
؊76.06  
؊76.35  
؊79.05  
؊80.36  
2ND  
3RD  
؊55.0  
؊60.0  
؊65.0  
3RD  
؊60.23  
؊82.01  
؊78.83  
؊81.28  
؊77.28  
؊84.54  
2ND  
3RD  
4TH  
5TH  
4TH  
5TH  
؊70.0  
؊75.0  
؊80.0  
؊85.0  
7TH  
6TH  
7TH  
8TH  
9TH  
2ND  
9TH  
7TH  
4TH  
6TH  
7TH  
3RD  
8TH  
6TH  
6TH  
4TH  
5TH  
؊75.08  
؊88.12  
؊77.87  
8TH  
8TH  
9TH  
؊90.0  
؊95.0  
؊92.78  
؊100.0  
؊105.0  
؊110.0  
؊115.0  
؊120.0  
0.0E؉0  
2.0E؉6  
4.0E؉6  
6.0E؉6  
8.0E؉6  
10.0E؉6  
9.0E؉6  
0.0E؉0  
2.0E؉6  
4.0E؉6  
6.0E؉6  
8.0E؉6  
10.0E؉6  
9.0E؉6  
1.0E؉6  
3.0E؉6  
5.0E؉6  
7.0E؉6  
1.0E؉6  
3.0E؉6  
5.0E؉6  
7.0E؉6  
Figure 46. FFT Plot for AD8051 Driving the AD9201 at  
9.5 MHz  
Figure 45. FFT Plot for AD8051 Driving the AD9201 at  
1 MHz  
–14–  
REV. B