AD8042
Each of the AD8042’s op amps is configured as a unity gain
follower by the feedback resistors (R
A
). Each op amp output
also drives the other as a unity gain inverter via the two R
BS
,
creating a totally symmetrical circuit.
0.1 F
+5V
+5V
0.1 F
If the + input to Amp 2 is grounded and a small positive signal
is applied to the + input of Amp 1, the output of Amp 1 will be
driven to saturation in the positive direction and the input of
Amp 2 driven to saturation in the negative direction. This is
similar to the way a conventional op amp behaves without any
feedback.
If a resistor (R
F
) is connected from the output of Amp 2 to the
+ input of Amp 1, negative feedback is provided which closes
the loop. An input resistor (R
I
) will make the circuit look like a
conventional inverting op amp configuration with differential
outputs.
The gain of this circuit from input to either output will be
±
R
F
/
R
I
. Or the single-ended-to-differential gain will be 2
¥
R
F
/R
I
.
This gives the circuit the advantage of being able to adjust its
gain by changing a single resistor.
The cable has a characteristic impedance of about 120
W.
Each
driver output is back terminated with a pair of 60.4
W
resistors
to make the source look like 120
W.
The receive end is termi-
nated with 121
W,
and the signal is measured differentially with
a pair of scope probes. One channel on the oscilloscope is
inverted and then the signals are added.
The scope photo in Figure 9 shows a 10 MHz, 2 V p-p input signal
driving the circuit with 50 m of category 5 twisted pair wire.
V
IN
1k
3
2
8
1k
1
+5V
+5V
0.1 F
1k
28
DV
DD
15
AV
DD
+5V
0.1 F
26
AV
DD
14
OTR
13
BIT1
12
BIT2
11
BIT3
10
BIT4
9
BIT5
8
BIT6
7
BIT7
6
BIT8
5
BIT9
4
BIT10
3
BIT11
2
BIT12
0.1 F
1k
AD8042
+5V
1k
6
2.49k
5
1k
7
4
V
IN
A
V
IN
B
CAPT
2.49k
0.1 F
0.1 F
10/16
0.1 F
0.1 F
18
17
22
AD9220
CAPB
V
REF
SENSE
CML
0.1 F
CLOCK
1
CLK
REFCOM
19
27
25
DV
SS
AV
SS
AV
SS
16
Figure 10. AD8042 Differential Driver for
the AD9220 12-Bit, 10-MSPS A/D Converter
The circuit was tested with a 1 MHz input signal and clocked at
10 MHz. An FFT response of the digital output is shown in
Figure 11.
Pin 5 is biased at 2.5 V by the voltage divider and bypassed. This
biases each output at 2.5 V. V
IN
is ac coupled such that V
IN
going
positive makes V
IN
A go positive and V
IN
B go in the negative
direction. The opposite happens for a negative going V
IN
.
1
1V
100
200mV
50ns
V
IN
90
10
0%
200mV
VERTICAL SCALE (15dB/DIV)
V
OUT
9
2
8
3
7
6
4
5
Figure 9. Differential Driver Frequency Response
Single-Supply Differential A/D Driver
The single-ended-to-differential converter circuit is also useful
as a differential driver for video speed, single-ended, differential
input A/D converters. Figure 10 is a schematic that shows such
a circuit differentially driving an AD9220, a 12-bit, 10-MSPS
A/D converter.
FUND FRQ 1000977
SMPL FRQ 10000000
THD
SNR
SINAD
SFDR
–82.00
71.13
70.79
–86.74
HARMONICS (dBc)
2nd –88.34 6th –99.47
3rd –86.74 7th –91.16
4th –99.26 8th –97.25
5th –90.67 9th –91.61
Figure 11. FFT of AD9220 Output When Driven by AD8042
REV. C
–13–
AD [ ANALOG DEVICES ]
