Data Sheet
AD7904/AD7914/AD7924
AD7914 SPECIFICATIONS
AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
B Version1
Unit
Test Conditions/Comments
fIN = 50 kHz sine wave, fSCLK = 20 MHz
B models
W models
B models
DYNAMIC PERFORMANCE
Signal to (Noise + Distortion) (SINAD)2
61
dB min
dB min
dB min
dB min
dB max
dB max
60.5
61
Signal-to-Noise Ratio (SNR)
60.5
−72
−74
W models
Total Harmonic Distortion (THD)2
Peak Harmonic or Spurious Noise (SFDR)
Intermodulation Distortion (IMD)
Second-Order Terms
Third-Order Terms
Aperture Delay
fa = 40.1 kHz, fb = 41.5 kHz
−90
−90
10
dB typ
dB typ
ns typ
Aperture Jitter
50
ps typ
Channel-to-Channel Isolation2
Full Power Bandwidth
−85
8.2
1.6
dB typ
MHz typ
MHz typ
fIN = 400 kHz
@ 3 dB
@ 0.1 dB
DC ACCURACY
Resolution
10
Bits
Integral Nonlinearity (INL)2
Differential Nonlinearity (DNL)2
0 V to REFIN Input Range
Offset Error2
Offset Error Match2
Gain Error2
Gain Error Match2
0.5
0.5
LSB max
LSB max
Guaranteed no missed codes to 10 bits
Straight binary output coding
2
LSB max
LSB max
LSB max
LSB max
0.2
0.5
0.2
0 V to 2 × REFIN Input Range
−REFIN to +REFIN biased about REFIN with twos
complement output coding
Positive Gain Error2
Positive Gain Error Match2
Zero Code Error2
0.5
0.2
2
0.2
0.5
0.2
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
Zero Code Error Match2
Negative Gain Error2
Negative Gain Error Match2
ANALOG INPUT
Input Voltage Range
0 to REFIN
V
RANGE bit set to 1
0 to 2 × REFIN
V
RANGE bit set to 0, AVDD/VDRIVE = 4.75 V to 5.25 V
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REFIN Input Voltage
DC Leakage Current
REFIN Input Impedance
LOGIC INPUTS
1
20
μA max
pF typ
2.5
1
36
V
1% specified performance
fSAMPLE = 1 MSPS
μA max
kΩ typ
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
0.7 × VDRIVE
0.3 × VDRIVE
1
10
V min
V max
μA max
pF max
Typically 10 nA, VIN = 0 V or VDRIVE
3
Input Capacitance, CIN
Rev. C | Page 5 of 32