AD7874
TERMINOLOGY
ACQUISITION TIME
PIN CONFIGURATIONS
DIP and SOIC
Acquisition Time is the time required for the output of the
track/hold amplifiers to reach their final values, within
±
1/2
LSB, after the falling edge of
INT
(the point at which the track/
holds return to track mode). This includes switch delay time,
slewing time and settling time for a full-scale voltage change.
APERTURE DELAY
V
IN1
V
IN2
V
DD
INT
CONVST
RD
CS
CLK
V
DD
DB11 (MSB)
1
2
3
4
5
6
7
8
9
10
28 V
IN4
27 V
IN3
26 V
SS
25 REF OUT
24 REF IN
23 AGND
22 DB0 (LSB)
TOP VIEW
(Not to Scale) 21 DB1
20 DB2
19 DB3
18 DB4
17 DB5
16 DB6
15 DB7
Aperture Delay is defined as the time required by the internal
switches to disconnect the hold capacitors from the inputs. This
produces an effective delay in sample timing. It is measured by
applying a step input and adjusting the
CONVST
input position
until the output code follows the step input change.
APERTURE DELAY MATCHING
AD7874
Aperture Delay Matching is the maximum deviation in aperture
delays across the four on-chip track/hold amplifiers.
APERTURE JITTER
DB10 11
DB9 12
DB8 13
DGND 14
Aperture Jitter is the uncertainty in aperture delay caused by
internal noise and variation of switching thresholds with signal
level.
V
DD
LCCC
V
IN1
V
IN4
V
IN3
V
IN2
INT
V
SS
DROOP RATE
Droop Rate is the change in the held analog voltage resulting
from leakage currents.
CONVST
5
6
7
8
9
4
3
2
1 28 27 26
25 REF OUT
24 REF IN
CHANNEL-TO-CHANNEL ISOLATION
RD
CS
CLK
V
DD
Channel-to-Channel Isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale 1 kHz signal to the other three inputs. The figure given is
the worst case across all four channels.
SNR, THD, IMD
AD7874
TOP VIEW
(Not to Scale)
23 AGND
22 DB0 (LSB)
21 DB1
20 DB2
19 DB3
DB11 (MSB) 10
DB10 11
12 13 14 15 16 17 18
DGND
DB7
DB6
DB8
DB9
DB5
DB4
See DYNAMIC SPECIFICATIONS section.
–4–
REV. C
AD [ ANALOG DEVICES ]
