AD780
TURN-ON TIME
OUTPUT CHANGE – 50mV/DIV
The time required for the output voltage to reach its final value
within a specified error band is defined as the turn-on settling
time. The two major factors that affect this are the active circuit
settling time and the time for the thermal gradients on the chip
to stabilize. Typical settling performance is shown in Figure 11
following. The AD780 settles to within 0.1% of its final value
within 10
µs.
0mA
10mA
I
LOAD
V
OUT
(C
L
= 0pF)
V
IN
5V
0V
10 s/DIV
Figure 12b. Settling Under Transient Resistive Load
V
OUT
2.500V
2.499V
2.498V
The dynamic load may be resistive and capacitive. For example
the load may be connected via a long capacitive cable. Figure 13
following shows the performance of the AD780 driving a
1000 pF, 0 mA to 10 mA load.
+V
IN
10 s/DIV
Figure 11. Turn-On Settling Time Performance
DYNAMIC PERFORMANCE
AD780
V
OUT
C
L
1000pF
249
The output stage of the AD780 has been designed to provide
superior static and dynamic load regulation.
Figure 12 shows the performance of the AD780 while driving a
0 mA to 10 mA load.
+V
IN
1 F
V
L
V
OUT
0V
1 F
AD780
V
OUT
Figure 13a. Capacitive Load Transient Response
Test Circuit
249
0mA
10mA
I
LOAD
V
L
V
OUT
0V
OUTPUT CHANGE – 50mV/DIV
V
OUT
(C
L
= 1000pF)
Figure 12a. Transient Resistive Load Test Circuit
10 s/DIV
Figure 13b. Settling Under Dynamic Capacitive Load
REV. B
–7–
AD [ ANALOG DEVICES ]
