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AD7705BN 参数 Datasheet PDF下载

AD7705BN图片预览
型号: AD7705BN
PDF下载: 下载PDF文件 查看货源
内容描述: 3 V / 5 V , 1毫瓦2- / 3通道16位Σ-Δ型ADC [3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs]
分类和应用:
文件页数/大小: 32 页 / 266 K
品牌: AD [ ANALOG DEVICES ]
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AD7705/AD7706
Table VI. Register Selection
RS2
0
0
0
0
1
1
1
1
R/W
RS1
0
0
1
1
0
0
1
1
RS0
0
1
0
1
0
1
0
1
Register
Communications Register
Setup Register
Clock Register
Data Register
Test Register
No Operation
Offset Register
Gain Register
Register Size
8 Bits
8 Bits
8 Bits
16 Bits
8 Bits
24 Bits
24 Bits
Read/Write Select. This bit selects whether the next operation is a read or write operation to the selected register.
A “0” indicates a write cycle for the next operation to the appropriate register, while a “1” indicates a read opera-
tion from the appropriate register.
Standby. Writing a “1” to this bit puts the part into its standby or power-down mode. In this mode, the part con-
sumes only 10
µA
of power supply current. The part retains its calibration coefficients and control word informa-
tion when in STANDBY. Writing a “0” to this bit places the part in its normal operating mode.
Channel Select. These two bits select a channel for conversion or for access to the calibration coefficients as out-
lined in Table VII. Three pairs of calibration registers on the part are used to store the calibration coefficients
following a calibration on a channel. They are shown in Tables VII for the AD7705 and Table VIII for the AD7706
to indicate which channel combinations have independent calibration coefficients. With CH1 at Logic 1 and CH0
at a Logic 0, the part looks at the AIN1(–) input internally shorted to itself on the AD7705 or at COMMON
internally shorted to itself on the AD7706. This can be used as a test method to evaluate the noise performance of
the part with no external noise sources. In this mode, the AIN1(–)/COMMON input should be connected to
an external voltage within the allowable common-mode range for the part.
Table VII. Channel Selection for AD7705
STBY
CH1–CH0
CH1
0
0
1
1
CH0
0
1
0
1
AIN(+)
AIN1(+)
AIN2(+)
AIN1(–)
AIN1(–)
AIN(–)
AIN1(–)
AIN2(–)
AIN1(–)
AIN2(–)
Calibration Register Pair
Register Pair 0
Register Pair 1
Register Pair 0
Register Pair 2
Table VIII. Channel Selection for AD7706
CH1
0
0
1
1
CH0
0
1
0
1
AIN
AIN1
AIN2
COMMON
AIN3
Reference
COMMON
COMMON
COMMON
COMMON
Calibration Register Pair
Register Pair 0
Register Pair 1
Register Pair 0
Register Pair 2
REV. A
–11–