AD7541A
BIPOLAR OPERATION
(4-QUADRANT MULTIPLICATION)
Figure 5 and Table III illustrate the circuitry and code relation-
ship for bipolar operation. With a dc reference (positive or nega-
tive polarity) the circuit provides offset binary operation. With
an ac reference the circuit provides full 4-quadrant multiplication.
With the DAC loaded to 1000 0000 0000, adjust R1 for
V
OUT
= 0 V (alternatively, one can omit R1 and R2 and adjust
the ratio of R3 to R4 for V
OUT
= 0 V). Full-scale trimming can
be accomplished by adjusting the amplitude of V
REF
or by vary-
ing the value of R5.
As in unipolar operation, A1 must be chosen for low V
OS
and
low I
B
. R3, R4 and R5 must be selected for matching and track-
ing. Mismatch of 2R3 to R4 causes both offset and full-scale
error. Mismatch of R5 to R4 or 2R3 causes full-scale error. C1
phase compensation (10 pF to 50 pF) may be required for sta-
bility, depending on amplifier used.
V
DD
R2
*
C1
33pF
OUT1 1
A1
AD544L
R6
5kΩ
10%
ANALOG
COMMON
BIT 1 – BIT 12
DIGITAL
GROUND
A2
V
OUT
AD544J
OUT2 2
GND
3
R3
10kΩ
R4
20kΩ
R5
20kΩ
Figure 6 and Table IV show an alternative method of achieving
bipolar output. The circuit operates with sign plus magnitude
code and has the advantage of giving 12-bit resolution in each
quadrant, compared with 11-bit resolution per quadrant for the
circuit of Figure 5. The AD7592 is a fully protected CMOS
changeover switch with data latches. R4 and R5 should match
each other to 0.01% to maintain the accuracy of the D/A con-
verter. Mismatch between R4 and R5 introduces a gain error.
V
DD
R2
*
C1
33pF
OUT1 1
A1
AD544L
ANALOG
COMMON
OUT2 2
GND
3
R4
20kΩ
R3
10kΩ
10%
1/2 AD7592JN
DIGITAL
GROUND
R5
20kΩ
V
OUT
A2
AD544J
16
V
DD
V
IN
R1
*
17 V
REF
18
R
FB
AD7541A
PINS 4–15
SIGN BIT
BIT 1 – BIT 12
*
FOR VALUES OF R1 AND R2
SEE TABLE 1.
Figure 6. 12-Bit Plus Sign Magnitude Operation
Table IV. 12-Bit Plus Sign Magnitude Code Table for Circuit
of Figure 6
16
V
DD
V
IN
R1
*
17 V
REF
18
R
FB
AD7541A
PINS 4–15
Sign
Bit
Binary Number in DAC
MSB
LSB
Analog Output, V
OUT
4095
+V
IN
×
4096
0 Volts
0 Volts
4095
–V
IN
×
4096
*
FOR VALUES OF R1 AND R2
SEE TABLE 1.
0
Figure 5. Bipolar Operation (4-Quadrant Multiplication)
1111 1111 1111
0000 0000 0000
0000 0000 0000
1111 1111 1111
0
Table III. Bipolar Code Table for Offset Binary Circuit of
Figure 5
1
1
Binary Number in DAC
MSB
LSB
Analog Output, V
OUT
Note: Sign bit of “0” connects R3 to GND.
1111
1111
1111
2047
+V
IN
2048
1
+V
IN
2048
0 Volts
1
–V
IN
2048
2048
–V
IN
2048
1000
1000
0111
0000
0000
1111
0001
0000
1111
0000
0000
0000
REV. B
–5–
AD [ ANALOG DEVICES ]
