AD7528–SPECIFICATIONS
(V
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
2
REF
A
= V
REF
B = +10 V; OUT A = OUT B = O V unless otherwise noted)
V
DD
= +15 V
T
A
= +25°C T
MIN
, T
MAX
8
±
1
±
1/2
±
1/2
±
1
±
4
±
2
±
1
±
0.0035
±
50
±
50
8
15
±
1
8
±
1
±
1/2
±
1/2
±
1
±
5
±
3
±
1
±
0.0035
±
200
±
200
8
15
±
1
Units
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
Test Conditions/Comments
V
DD
= +5 V
Version
All
J, A, S
K, B, T
L, C, U
All
J, A, S
K, B, T
L, C, U
1
T
A
= +25°C
8
±
1
±
1/2
±
1/2
±
1
±
4
±
2
±
1
±
0.007
±
50
±
50
8
15
±
1
T
MIN
, T
MAX
8
±
1
±
1/2
±
1/2
±
1
±
6
±
4
±
3
±
0.007
±
400
±
400
8
15
±
1
This is an Endpoint Linearity Specification
Differential Nonlinearity
Gain Error
All Grades Guaranteed Monotonic Over
Full Operating Temperature Range
Measured Using Internal R
FB
A and R
FB
B
Both DAC Latches Loaded with 11111111
Gain Error is Adjustable Using Circuits
of Figures 4 and 5
Gain Temperature Coefficient
3
∆Gain/∆Temperature
Output Leakage Current
OUT A (Pin 2)
OUT B (Pin 20)
Input Resistance (V
REF
A, V
REF
B)
V
REF
A/V
REF
B Input Resistance
Match
DIGITAL INPUTS
Input High Voltage
V
IH
Input Low Voltage
V
IL
Input Current
I
IN
Input Capacitance
DB0–DB7
WR, CS, DAC A/DAC
B
SWITCHING CHARACTERISTICS
3
Chip Select to Write Set Up Time
t
CS
Chip Select to Write Hold Time
t
CH
DAC Select to Write Set Up Time
t
AS
DAC Select to Write Hold Time
t
AH
Data Valid to Write Set Up Time
t
DS
Data Valid to Write Hold Time
t
DH
Write Pulsewidth
t
WR
POWER SUPPLY
I
DD
4
All
All
All
All
%/°C max
nA max
nA max
kΩ min
kΩ max
% max
DAC Latches Loaded with 00000000
Input Resistance TC = –300 ppm/°C, Typical
Input Resistance is 11 kΩ
All
All
All
All
All
All
2.4
0.8
±
1
10
15
2.4
0.8
±
10
10
15
13.5
1.5
±
1
10
15
13.5
1.5
±
10
10
15
V min
V max
µA
max
pF max
pF max
See Timing Diagram
V
IN
= 0 or V
DD
All
All
All
All
All
All
All
All
All
90
0
90
0
80
0
90
2
100
100
0
100
0
90
0
100
2
500
60
10
60
10
30
0
60
2
100
80
15
80
15
40
0
80
2
500
ns min
ns min
ns min
ns min
ns min
ns min
ns min
mA max
µA
max
See Figure 3
All Digital Inputs V
IL
or V
IH
All Digital Inputs 0 V or V
DD
AC PERFORMANCE CHARACTERISTICS
Parameter
DC SUPPLY REJECTION (∆GAIN/∆V
DD
)
CURRENT SETTLING TIME
2
5
(Measured Using Recommended P.C. Board Layout (Figure 7) and AD644 as
Output Amplifiers)
V
DD
= +15 V
Test Conditions/Comments
To 1/2 LSB. OUT A/OUT B Load = 100
Ω.
WR
=
CS
= 0 V. DB0–DB7 = 0 V to V
DD
or
V
DD
to 0 V
V
REF
A = V
REF
B = +10 V
OUT A, OUT B Load = 100
Ω
C
EXT
= 13 pF
WR
=
CS
= 0 V DB0–DB7 = 0 V to V
DD
or
V
DD
to 0 V
For Code Transition 00000000 to 11111111
DAC Latches Loaded with 00000000
DAC Latches Loaded with 11111111
0.01
180
0.02
200
% per % max
∆V
DD
=
±
5%
ns max
V
DD
= +5 V
Version
All
All
1
T
A
= +25°C
0.02
350
T
MIN
, T
MAX
T
A
= +25°C T
MIN
, T
MAX
Units
0.04
400
PROPAGATION DELAY (From Digital In-
put to 90% of Final Analog Output Current)
All
220
270
80
100
ns max
DIGITAL-TO-ANALOG GLITCH IMPULSE All
OUTPUT CAPACITANCE
C
OUT
A
C
OUT
B
C
OUT
A
C
OUT
B
AC FEEDTHROUGH
6
V
REF
A to OUT A
V
REF
B to OUT B
All
160
50
50
120
120
–70
–70
50
50
120
120
–65
–65
440
50
50
120
120
–70
–70
50
50
120
120
–65
–65
nV sec typ
pF max
pF max
pF max
pF max
dB max
dB max
All
V
REF
A, V
REF
B = 20 V p-p Sine Wave
@ 100 kHz
–2–
REV. B
AD [ ANALOG DEVICES ]
