AD7528
MICROPROCESSOR INTERFACE
A8–A15
A0–A15
A**
V
MA
ADDRESS
DECODE
LOGIC
A + 1**
2
WR
DB0
DB7
D0–D7
DATA BUS
*ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY
**A = DECODED 7528 ADDR DAC A
A + 1 = DECODED 7528 ADDR DAC B
ADDRESS BUS
DAC A/DAC
B
CS
DAC A
WR
ALE
LATCH
8212
A**
ADDRESS BUS
DAC A/DAC
B
CS
A + 1**
WR
DB0
DB7
ADDR/DATA BUS
*ANALOG CIRCUITRY HAS BEEN OMITTED FOR CLARITY
**A = DECODED 7528 ADDR DAC A
A + 1 = DECODED 7528 ADDR DAC B
NOTE:
8085 INSTRUCTION SHLD (STORE H & L DIRECT) CAN UPDATE
BOTH DACs WITH DATA FROM H AND L REGISTERS
DAC A
CPU
8085
ADDRESS
DECODE
LOGIC
AD7528*
DAC B
CPU
6800
AD7528*
DAC B
AD0–AD7
Figure 11. AD7528 Dual DAC to 6800 CPU Interface
Figure 12. AD7528 Dual DAC to 8085 CPU Interface
PROGRAMMABLE WINDOW COMPARATOR
TEST INPUT
0 TO –V
REF
V
REF
A
DAC A
DATA
INPUTS
CS
WR
DAC A/DAC
B
+V
REF
DAC B
V
REF
B
R
FB
B
DB0
DB7
V
DD
R
FB
A
OUT A 3
2
7
V
CC
1k
In the circuit of Figure 13 the AD7528 is used to implement a
programmable window comparator. DACs A and B are loaded
with the required upper and lower voltage limits for the test,
respectively. If the test input is not within the programmed
limits, the pass/fail output will indicate a fail (logic zero).
AD7528
AD311
COMPARATOR
OUT B 2
3
PASS/
FAIL
OUTPUT
7
AD311
COMPARATOR
Figure 13. Digitally Programmable Window Comparator
(Upper and Lower Limit Detector)
PROGRAMMABLE STATE VARIABLE FILTER
In this state variable or universal filter configuration (Figure 14)
DACs A1 and B1 control the gain and Q of the filter character-
istic while DACs A2 and B2 control the cutoff frequency, f
C
.
DACs A2 and B2 must track accurately for the simple expres-
sion for f
C
to hold. This is readily accomplished by the AD7528.
Op amps are 2
×
AD644. C3 compensates for the effects of op
amp gain bandwidth limitations.
R5
30k
R4
30k
C1
1000pF
The filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor
control of filter parameters is required, e.g., equalizer, tone
controls, etc.
Programmable range for component values shown is f
C
= 0 kHz
to 15 kHz and Q = 0.3 to 4.5.
CIRCUIT EQUATIONS
C2
1000pF
C
1
=
C
2,
R
1
=
R
2,
R
4
=
R
5
LOW
PASS
OUTPUT
R3
10k
A1
C3
47pF
HIGH
PASS
OUTPUT
A2
A3
BAND
PASS
OUTPUT
A4
V
DD
V
DD
AD7528
V
IN
DAC A1
R
S
DAC B1
R
F
DAC A2
R1
AD7528
DAC B2
R2
1
2
π
R
1
C
1
R
3
R
F
Q
=
×
R
4
R
FBB
1
R
F
A
O
=
–
R
S
f
C
=
NOTE
DAC Equivalent Resistance
Equals
256
×
(
DAC Ladder Resistance
)
DAC Digital Code
DB0–DB7
DATA 1
CS WR DAC A/DAC
B
DB0–DB7
DATA 2
CS WR DAC A/DAC
B
Figure 14. Digitally Controlled State Variable Filter
REV. B
–7–
AD [ ANALOG DEVICES ]
