AD7524–SPECIFICATIONS
(V
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
J, A, S Versions
K, B, T Versions
L, C, U Versions
Monotonicity
Gain Error
2
Average Gain TC
3
DC Supply Rejection,
3
∆Gain/∆V
DD
Output Leakage Current
I
OUT1
(Pin 1)
I
OUT2
(Pin 2)
DYNAMIC PERFORMANCE
Output Current Settling Time
3
(to 1/2 LSB)
AC Feedthrough
3
at OUT1
at OUT2
REFERENCE INPUT
R
IN
(Pin 15 to GND)
4
ANALOG OUTPUTS
Output Capacitance
3
C
OUT1
(Pin 1)
C
OUT2
(Pin 2)
C
OUT1
(Pin 1)
C
OUT2
(Pin 2)
DIGITAL INPUTS
Input HIGH Voltage Requirement
V
IH
Input LOW Voltage Requirement
V
IL
Input Current
I
IN
Input Capacitance
3
DB0–DB7
WR, CS
SWITCHING CHARACTERISTICS
Chip Select to Write Setup Time
5
t
CS
AD7524J, K, L, A, B, C
AD7524S, T, U
Chip Select to Write Hold Time
t
CH
All Grades
Write Pulse Width
t
WR
AD7524J, K, L, A, B, C
AD7524S, T, U
Data Setup Time
t
DS
AD7524J, K, L, A, B, C
AD7524S, T, U
Data Hold Time
t
DH
All Grades
POWER SUPPLY
I
DD
8
±
1/2
±
1/2
±
1/2
Guaranteed
±
2 1/2
±
40
0.08
0.002
±50
±50
8
±
1/2
±
1/4
±
1/8
Guaranteed
±
1 1/4
±
10
0.02
0.001
±50
±50
REF
= +10 V, V
OUT1
= V
OUT2
= 0 V, unless otherwise noted)
Test Conditions/Comments
Limit, T
A
= +25 C
Limit, T
MIN
, T
MAX1
V
DD
= +5 V V
DD
= +15 V V
DD
= 5 V
V
DD
= +15 V Units
8
±
1/2
±
1/2
±
1/2
Guaranteed
±
3 1/2
±
40
0.16
0.01
±400
±400
8
±
1/2
±
1/4
±
1/8
Guaranteed
±
1 1/2
±
10
0.04
0.005
±200
±200
Bits
LSB max
LSB max
LSB max
LSB max
ppm/°C
Gain TC Measured from +25°C to
T
MIN
or from +25°C to T
MAX
% FSR/% max
∆V
DD
=
±10%
% FSR/% typ
nA max
nA max
DB0–DB7 = 0 V;
WR, CS
= 0 V; V
REF
=
±10
V
DB0–DB7 = V
DD
;
WR, CS
= 0 V; V
REF
=
±
10 V
400
250
500
350
ns max
OUT1 Load = 100
Ω,
C
EXT
= 13 pF;
WR, CS
=
0 V; DB0–DB7 = 0 V to V
DD
to 0 V.
V
REF
=
±10
V, 100 kHz Sine Wave; DB0–DB7 =
0 V;
WR, CS
= 0 V
0.25
0.25
5
20
0.25
0.25
5
20
0.5
0.5
5
20
0.5
0.5
5
20
% FSR max
% FSR max
kΩ min
kΩ max
120
30
30
120
120
30
30
120
120
30
30
120
120
30
30
120
pF max
pF max
pF max
pF max
DB0–DB7 = V
DD
;
WR, CS
= 0 V
DB0–DB7 = 0 V;
WR, CS
= 0 V
+2.4
+0.8
±1
5
20
+13.5
+1.5
±1
5
20
+2.4
+0.5
±10
5
20
+13.5
+1.5
±10
5
20
V min
V max
µA
max
pF max
pF max
V
IN
= 0 V or V
DD
V
IN
= 0 V
V
IN
= 0 V
See Timing Diagram
t
WR
= t
CS
170
170
100
100
220
240
130
150
ns min
ns min
0
0
0
0
ns min
t
CS
≥
t
WR
, t
CH
≥
0
170
170
100
100
220
240
130
150
ns min
ns min
135
135
60
60
170
170
80
100
ns min
ns min
10
1
100
10
2
100
10
2
500
10
2
500
ns min
mA max
µA
max
All Digital Inputs V
IL
or V
IH
All Digital Inputs 0 V or V
DD
NOTES
1
Temperature ranges as follows: J, K, L versions: –40°C to +85°C
A, B, C versions: –40°C to +85°C
S, T, U versions: –55°C to +125°C
2
Gain error is measured using internal feedback resistor. Full-Scale Range (FSR) = V
REF
.
3
Guaranteed not tested.
4
DAC thin-film resistor temperature coefficient is approximately –300 ppm/°C.
5
AC parameter, sample tested @ +25°C to ensure conformance to specification.
Specifications subje
ct to change without notice
.
–2–
REV. B
AD [ ANALOG DEVICES ]
