AD744–SPECIFICATIONS
Model
INPUT OFFSET VOLTAGE
1
Initial Offset
Offset
vs. Temp.
vs. Supply
2
vs. Supply
Long-Term Stability
INPUT BIAS CURRENT
3
Either Input
Either Input @ T
MAX
=
J, K
A, B, C
S, T
Either Input
Offset Current
Offset Current @ T
MAX
=
J, K
A, B, C
S, T
FREQUENCY RESPONSE
Gain BW, Small Signal
Full Power Response
Slew Rate, Unity Gain
Settling Time to 0.01%
4
Total Harmonic
Distortion
INPUT IMPEDANCE
Differential
Common Mode
INPUT VOLTAGE RANGE
Differential
5
Common-Mode Voltage
Over Max Operating Range
6
Common-Mode
Rejection Ratio
Conditions
T
MIN
to T
MAX
(@ +25 C and
Min
Typ
0.3
5
95
15
15 V dc, unless otherwise noted)
AD744K/B/T
Max
1.0
2
20
88
88
Min
Typ
0.25
5
100
15
100
2.3
6.4
102
150
50
1.1
3.2
52
9
50
0.75
30
0.7
1.9
31
40
10
0.2
0.6
10
13
1.2
75
0.5
100
2.3
6.4
102
150
50
1.1
3.2
52
Max
0.5
1.0
10
Unit
mV
mV
µV/°C
dB
dB
µV/month
pA
nA
nA
nA
pA
pA
nA
nA
nA
MHz
MHz
V/µs
µs
AD744J/A/S
T
MIN
to T
MAX
82
82
V
CM
= 0 V
V
CM
= 0 V
70°C
85°C
125°C
V
CM
= +10 V
V
CM
= 0 V
V
CM
= 0 V
70°C
85°C
125°C
G = –1
V
O
= 20 V p-p
G = –1
G = –1
f = 1 kHz
R1
≥
2 kΩ
V
O
= 3 V rms
8
45
30
0.7
1.9
31
40
20
0.4
1.3
20
13
1.2
75
0.5
0.75
0.0003
3
3
10
12
||5.5
10
12
||5.5
0.0003
3
3
10
12
||5.5
10
12
||5.5
%
Ω||pF
Ω||pF
V
V
V
dB
dB
dB
dB
µV
p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
V/mV
V/mV
V
V
mA
pF
V
V
mA
±
20
+14.5, –11.5
–11
V
CM
=
±
10 V
T
MIN
to T
MAX
V
CM
=
±
11 V
T
MIN
to T
MAX
0.1 to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
V
O
=
±
10 V
R
LOAD
≥
2 kΩ
T
MIN
to T
MAX
R
LOAD
≥
2 kΩ
T
MIN
to T
MAX
Short Circuit
Gain = –1
200
100
+13,
–12.5
±
12
78
76
72
70
88
84
84
80
2
45
22
18
16
0.01
400
250
100
+13, –12.5
±
12
1000
±
15
3.5
+13
–11
82
80
78
74
±
20
+14.5, –11.5
+13
88
84
84
80
2
45
22
18
16
0.01
400
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
OPEN LOOP GAIN
7
OUTPUT CHARACTERISTICS
Voltage
Current
Capacitive Load
8
POWER SUPPLY
Rated Performance
Operating Range
Quiescent Current
+13.9, –13.3
+13.8, –13.1
25
+13.9, –13.3
+13.8, –13.1
25
1000
±
15
3.5
±
4.5
±
18
5.0
±
4.5
±
18
4.0
NOTES
1
Input offset voltage specifications are guaranteed after 5 minutes of operation at T
A
= +25°C.
2
PSRR test conditions: +V
S
= 15 V, –V
S
= –12 V to –18 V and +V
S
= +12 V to +18 V, –V
S
= –15 V.
3
Bias Current Specifications are guaranteed maximum at either input after 5 minutes of operation at T
A
= +25°C. For higher temperature, the current doubles every 10°C.
4
Gain = –1, R
L
= 2 k, C
L
= 10 pF, refer to Figure 25.
5
Defined as voltage between inputs, such that neither exceeds
±
10 V from ground.
6
Typically exceeding –14.1 V negative common-mode voltage on either input results in an output phase reversal.
7
Open-Loop Gain is specified with V
OS
both nulled and unnulled.
8
Capacitive load drive specified for C
COMP
= 20 pF with the device connected as shown in Figure 32. Under these conditions, slew rate = 14 V/
µ
s and 0.01% settling time = 1.5
µs
typical.
Refer to Table II for optimum compensation while driving a capacitive load.
Specifications subject to change without notice. All min and max specifications are guaranteed.
–2–
REV.C
AD [ ANALOG DEVICES ]
