AD7416/AD7417/AD7418
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
SDA
2
SCL
3
OTI
4
16
NC
15
CONVST
AD7417
14
V
DD
13
A0
TOP VIEW
REF
IN 5
(Not to Scale)
12
A1
GND
6
A
IN1 7
A
IN2 8
11
A2
01126-005
10
A
IN4
9
A
IN3
NC = NO CONNECT
Figure 6. AD7417 Pin Configuration (SOIC/TSSOP)
Table 4. AD7417 Pin Function Descriptions
Pin No.
1, 16
2
3
4
Mnemonic
NC
SDA
SCL
OTI
Description
No Connection. Do not connect anything to this pin.
Digital I/O. Serial bus bidirectional data. Push-pull output.
Digital Input. Serial bus clock.
This pin is a logic output. The overtemperature indicator (OTI) is set if the result of a conversion on Channel 0
(temperature sensor) is greater than an 8-bit word in the T
OTI
setpoint register. The signal is reset at the end of a
serial read operation. Open-drain output.
Reference Input. An external 2.5 V reference can be connected to the AD7417 at this pin. To enable the on-chip
reference, the REF
IN
pin should be tied to GND. If an external reference is connected to the AD7417, the internal
reference shuts down.
Ground reference for track-and-hold, comparator and capacitor DAC, and digital circuitry.
Analog Input Channels. The AD7417 has four analog input channels. The input channels are single-ended with
respect to GND. The input channels can convert voltage signals in the range of 0 V to VREF. A channel is selected by
writing to the configuration register of the AD7417.
Digital Input. This is the highest programmable bit of the serial bus address.
Digital Input. This is the middle programmable bit of the serial bus address.
Digital Input. This is the lowest programmable bit of the serial bus address.
Positive Supply Voltage, 2.7 V to 5.5 V.
Logic Input Signal. Convert start signal. The rising edge of this signal fully powers up the part. The power-up time
for the part is 4 μs. If the CONVST pulse is greater than 4 μs, the falling edge of CONVST places the track-and-hold
mode into hold mode and initiates a conversion. If the pulse is less than 4 μs, an internal timer ensures that the
track-and-hold does not go into hold, and conversion is not initiated until the power-up time has elapsed. The
track-and-hold goes into track mode again at the end of conversion (see the Operating Modes section).
5
REF
IN
6
7 to 10
GND
A
IN1
to A
IN4
11
12
13
14
15
A2
A1
A0
V
DD
CONVST
Rev. I | Page 8 of 24
AD [ ANALOG DEVICES ]
