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AD73311LARS 参数 Datasheet PDF下载

AD73311LARS图片预览
型号: AD73311LARS
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本,低功耗CMOS通用模拟前端 [Low Cost, Low Power CMOS General Purpose Analog Front End]
分类和应用: 电信集成电路电信电路光电二极管
文件页数/大小: 36 页 / 380 K
品牌: AD [ ANALOG DEVICES ]
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FEATURES
16-Bit A/D Converter
16-Bit D/A Converter
Programmable Input/Output Sample Rates
76 dB ADC SNR
77 dB DAC SNR
Programmable Sampling Rate
64 kS/s Maximum Sample Rate
–90 dB Crosstalk
Low Group Delay (25 ms Typ per ADC Channel,
50 ms Typ per DAC Channel)
Programmable Input/Output Gain
Flexible Serial Port Which Allows Up to Eight Devices
to Be Connected in Cascade
Single (+3 V) Supply Operation
33 mW Max Power Consumption at 2.7 V
On-Chip Reference
20-Lead SOIC/SSOP/TSSOP Packages
APPLICATIONS
General Purpose Analog I/O
Speech Processing
Cordless and Personal Communications
Telephony
Active Control of Sound and Vibration
Data Communications
Low Cost, Low Power CMOS
General Purpose Analog Front End
AD73311L
GENERAL DESCRIPTION
The AD73311L is a complete front-end processor for general
purpose applications including speech and telephony. It features
a 16-bit A/D conversion channel and a 16-bit D/A conversion
channel. Each channel provides 70 dB signal-to-noise ratio over
a voiceband signal bandwidth. The final channel bandwidth can
be reduced, and signal-to-noise ratio improved, by external
digital filtering in a DSP engine.
The AD73311L is suitable for a variety of applications in the
speech and telephony area, including low bit rate, high quality
compression, speech enhancement, recognition and synthesis.
The low group delay characteristic of the part makes it suitable
for single or multichannel active control applications.
The gains of the A/D and D/A conversion channels are program-
mable over 38 dB and 21 dB ranges respectively. An on-chip
reference voltage is included to allow single supply operation.
A serial port (SPORT) allows easy interfacing of single or cas-
caded devices to industry standard DSP engines.
The AD73311L is available in 20-lead SOIC, SSOP and
TSSOP packages.
FUNCTIONAL BLOCK DIAGRAM
AVDD1
AVDD2
DVDD
VINP
VINN
ANALOG
LOOPBACK/
SINGLE-ENDED
ENABLE
SDI
0/38dB
PGA
ANALOG
SIGMA-DELTA
MODULATOR
DECIMATOR
SDIFS
SCLK
SERIAL
I/O
PORT
SDO
SDOFS
SE
MCLK
REFERENCE
RESET
VOUTP
+6/–15dB
PGA
VOUTN
REFCAP
REFOUT
CONTINUOUS
TIME
LOW-PASS FILTER
SWITCHED-
CAPACITOR
LOW-PASS FILTER
1-BIT
DAC
DIGITAL
SIGMA-DELTA
MODULATOR
INTERPOLATOR
AD73311L
AGND1
AGND2
DGND
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000