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AD7249AR 参数 Datasheet PDF下载

AD7249AR图片预览
型号: AD7249AR
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS双路12位串行DACPORT [LC2MOS Dual 12-Bit Serial DACPORT]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 12 页 / 151 K
品牌: AD [ ANALOG DEVICES ]
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AD7249
PIN FUNCTION DESCRIPTION (DIP & SOIC PIN NUMBERS)
Pin
11
12
13
14
15
16
Mnemonic
REFOUT
REFIN
R
OFSB
V
OUTB
AGND
CLR
Description
Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the
part using its internal reference, REFOUT should be connected to REFIN.
Voltage Reference Input. It is internally buffered before being applied to both DACs. The nominal
reference voltage for specified operation of the AD7249 is 5 V.
Output Offset Resistor for the amplifier of DAC B. It is connected to V
OUTB
for the +5 V range, to
AGND for the +10 V range and to REFIN for the –5 V to +5 V range.
Analog Output Voltage of DAC B. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and –5 V to +5 V.
Analog Ground. Ground reference for all analog circuitry.
Clear, Logic Input. Taking this input low clears both DACs. It sets V
OUTA
and V
OUTB
to 0 V in both
unipolar ranges and the twos complement bipolar range and to –REFIN in the offset binary bipolar
range.
Logic Input. This input selects the data format to be either binary or twos complement. In both uni-
polar ranges natural binary format is selected by connecting this input to a Logic “0”. In the bipolar
configuration offset binary format is selected with a Logic “0” while a Logic “1” selects twos complement.
Digital Ground. Ground reference for all digital circuitry.
Serial Data In, Logic Input. The 16-bit serial data word is applied to this input.
Load DAC, Logic Input. Updates both DAC outputs. The DAC outputs are updated on the falling
edge of this signal or alternatively if this line is permanently low, an automatic update mode is se-
lected whereby both DACs are updated on the 16th falling SCLK pulse.
Serial Clock, Logic Input. Data is clocked into the input register on each falling SCLK edge.
Data Synchronization Pulse, Logic Input. Taking this input low initializes the internal logic in readi-
ness for a new data word.
Positive Power Supply.
Analog Output Voltage of DAC A. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and –5 V to +5 V.
Negative Power Supply (used for the output amplifier only) may be connected to 0 V for single sup-
ply operation or –12 V to –15 V for dual supplies.
Output Offset Resistor for the amplifier of DAC A. It is connected to V
OUTA
for the +5 V range, to
AGND for the +10 V range and to REFIN for the –5 V to +5 V range.
17
BIN/COMP
18
19
10
DGND
SDIN
LDAC
11
12
13
14
15
16
SCLK
SYNC
V
DD
V
OUTA
V
SS
R
OFSA
PIN CONFIGURATIONS
(DIP and SOIC)
ORDERING GUIDE
Model
REFOUT
1
REFIN
2
R
OFSB 3
V
OUTB 4
16
R
OFSA
15
V
SS
14
V
OUTA
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
Relative
Accuracy
±
1 LSB
±
1/2 LSB
±
1 LSB
±
1/2 LSB
±
1 LSB
Package
Option
N-16
N-16
R-16
R-16
Q-16
AD7249
13
V
DD
TOP VIEW
AGND
5
(Not to Scale)
12
SYNC
CLR
6
11
SCLK
10
LDAC
9
AD7249AN
AD7249BN
AD7249AR
AD7249BR
AD7249SQ
1
BIN/COMP
7
DGND
8
SDIN
NOTE
1
Available to /883B processing only. Contact your local sales office for military
data sheet.
–4–
REV. C